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- Apr 19, 2011, 11:12:07 PM (14 years ago)
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- clamav/trunk
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clamav/trunk ¶
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TabularUnified clamav/trunk/libclamav/c++/llvm/include/llvm/CodeGen/SelectionDAGNodes.h ¶
r189 r319 26 26 #include "llvm/ADT/SmallVector.h" 27 27 #include "llvm/ADT/STLExtras.h" 28 #include "llvm/CodeGen/ISDOpcodes.h" 28 29 #include "llvm/CodeGen/ValueTypes.h" 29 30 #include "llvm/CodeGen/MachineMemOperand.h" … … 41 42 class SDNode; 42 43 class Value; 44 class MCSymbol; 43 45 template <typename T> struct DenseMapInfo; 44 46 template <typename T> struct simplify_type; … … 56 58 }; 57 59 58 /// ISD namespace - This namespace contains an enum which represents all of the59 /// SelectionDAG node types and value types.60 ///61 60 namespace ISD { 62 63 //===--------------------------------------------------------------------===//64 /// ISD::NodeType enum - This enum defines the target-independent operators65 /// for a SelectionDAG.66 ///67 /// Targets may also define target-dependent operator codes for SDNodes. For68 /// example, on x86, these are the enum values in the X86ISD namespace.69 /// Targets should aim to use target-independent operators to model their70 /// instruction sets as much as possible, and only use target-dependent71 /// operators when they have special requirements.72 ///73 /// Finally, during and after selection proper, SNodes may use special74 /// operator codes that correspond directly with MachineInstr opcodes. These75 /// are used to represent selected instructions. See the isMachineOpcode()76 /// and getMachineOpcode() member functions of SDNode.77 ///78 enum NodeType {79 // DELETED_NODE - This is an illegal value that is used to catch80 // errors. This opcode is not a legal opcode for any node.81 DELETED_NODE,82 83 // EntryToken - This is the marker used to indicate the start of the region.84 EntryToken,85 86 // TokenFactor - This node takes multiple tokens as input and produces a87 // single token result. This is used to represent the fact that the operand88 // operators are independent of each other.89 TokenFactor,90 91 // AssertSext, AssertZext - These nodes record if a register contains a92 // value that has already been zero or sign extended from a narrower type.93 // These nodes take two operands. The first is the node that has already94 // been extended, and the second is a value type node indicating the width95 // of the extension96 AssertSext, AssertZext,97 98 // Various leaf nodes.99 BasicBlock, VALUETYPE, CONDCODE, Register,100 Constant, ConstantFP,101 GlobalAddress, GlobalTLSAddress, FrameIndex,102 JumpTable, ConstantPool, ExternalSymbol, BlockAddress,103 104 // The address of the GOT105 GLOBAL_OFFSET_TABLE,106 107 // FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and108 // llvm.returnaddress on the DAG. These nodes take one operand, the index109 // of the frame or return address to return. An index of zero corresponds110 // to the current function's frame or return address, an index of one to the111 // parent's frame or return address, and so on.112 FRAMEADDR, RETURNADDR,113 114 // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to115 // first (possible) on-stack argument. This is needed for correct stack116 // adjustment during unwind.117 FRAME_TO_ARGS_OFFSET,118 119 // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the120 // address of the exception block on entry to an landing pad block.121 EXCEPTIONADDR,122 123 // RESULT, OUTCHAIN = LSDAADDR(INCHAIN) - This node represents the124 // address of the Language Specific Data Area for the enclosing function.125 LSDAADDR,126 127 // RESULT, OUTCHAIN = EHSELECTION(INCHAIN, EXCEPTION) - This node represents128 // the selection index of the exception thrown.129 EHSELECTION,130 131 // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents132 // 'eh_return' gcc dwarf builtin, which is used to return from133 // exception. The general meaning is: adjust stack by OFFSET and pass134 // execution to HANDLER. Many platform-related details also :)135 EH_RETURN,136 137 // TargetConstant* - Like Constant*, but the DAG does not do any folding or138 // simplification of the constant.139 TargetConstant,140 TargetConstantFP,141 142 // TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or143 // anything else with this node, and this is valid in the target-specific144 // dag, turning into a GlobalAddress operand.145 TargetGlobalAddress,146 TargetGlobalTLSAddress,147 TargetFrameIndex,148 TargetJumpTable,149 TargetConstantPool,150 TargetExternalSymbol,151 TargetBlockAddress,152 153 /// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)154 /// This node represents a target intrinsic function with no side effects.155 /// The first operand is the ID number of the intrinsic from the156 /// llvm::Intrinsic namespace. The operands to the intrinsic follow. The157 /// node has returns the result of the intrinsic.158 INTRINSIC_WO_CHAIN,159 160 /// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)161 /// This node represents a target intrinsic function with side effects that162 /// returns a result. The first operand is a chain pointer. The second is163 /// the ID number of the intrinsic from the llvm::Intrinsic namespace. The164 /// operands to the intrinsic follow. The node has two results, the result165 /// of the intrinsic and an output chain.166 INTRINSIC_W_CHAIN,167 168 /// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)169 /// This node represents a target intrinsic function with side effects that170 /// does not return a result. The first operand is a chain pointer. The171 /// second is the ID number of the intrinsic from the llvm::Intrinsic172 /// namespace. The operands to the intrinsic follow.173 INTRINSIC_VOID,174 175 // CopyToReg - This node has three operands: a chain, a register number to176 // set to this value, and a value.177 CopyToReg,178 179 // CopyFromReg - This node indicates that the input value is a virtual or180 // physical register that is defined outside of the scope of this181 // SelectionDAG. The register is available from the RegisterSDNode object.182 CopyFromReg,183 184 // UNDEF - An undefined node185 UNDEF,186 187 // EXTRACT_ELEMENT - This is used to get the lower or upper (determined by188 // a Constant, which is required to be operand #1) half of the integer or189 // float value specified as operand #0. This is only for use before190 // legalization, for values that will be broken into multiple registers.191 EXTRACT_ELEMENT,192 193 // BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given194 // two values of the same integer value type, this produces a value twice as195 // big. Like EXTRACT_ELEMENT, this can only be used before legalization.196 BUILD_PAIR,197 198 // MERGE_VALUES - This node takes multiple discrete operands and returns199 // them all as its individual results. This nodes has exactly the same200 // number of inputs and outputs. This node is useful for some pieces of the201 // code generator that want to think about a single node with multiple202 // results, not multiple nodes.203 MERGE_VALUES,204 205 // Simple integer binary arithmetic operators.206 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,207 208 // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing209 // a signed/unsigned value of type i[2*N], and return the full value as210 // two results, each of type iN.211 SMUL_LOHI, UMUL_LOHI,212 213 // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and214 // remainder result.215 SDIVREM, UDIVREM,216 217 // CARRY_FALSE - This node is used when folding other nodes,218 // like ADDC/SUBC, which indicate the carry result is always false.219 CARRY_FALSE,220 221 // Carry-setting nodes for multiple precision addition and subtraction.222 // These nodes take two operands of the same value type, and produce two223 // results. The first result is the normal add or sub result, the second224 // result is the carry flag result.225 ADDC, SUBC,226 227 // Carry-using nodes for multiple precision addition and subtraction. These228 // nodes take three operands: The first two are the normal lhs and rhs to229 // the add or sub, and the third is the input carry flag. These nodes230 // produce two results; the normal result of the add or sub, and the output231 // carry flag. These nodes both read and write a carry flag to allow them232 // to them to be chained together for add and sub of arbitrarily large233 // values.234 ADDE, SUBE,235 236 // RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.237 // These nodes take two operands: the normal LHS and RHS to the add. They238 // produce two results: the normal result of the add, and a boolean that239 // indicates if an overflow occured (*not* a flag, because it may be stored240 // to memory, etc.). If the type of the boolean is not i1 then the high241 // bits conform to getBooleanContents.242 // These nodes are generated from the llvm.[su]add.with.overflow intrinsics.243 SADDO, UADDO,244 245 // Same for subtraction246 SSUBO, USUBO,247 248 // Same for multiplication249 SMULO, UMULO,250 251 // Simple binary floating point operators.252 FADD, FSUB, FMUL, FDIV, FREM,253 254 // FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This255 // DAG node does not require that X and Y have the same type, just that they256 // are both floating point. X and the result must have the same type.257 // FCOPYSIGN(f32, f64) is allowed.258 FCOPYSIGN,259 260 // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point261 // value as an integer 0/1 value.262 FGETSIGN,263 264 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the265 /// specified, possibly variable, elements. The number of elements is266 /// required to be a power of two. The types of the operands must all be267 /// the same and must match the vector element type, except that integer268 /// types are allowed to be larger than the element type, in which case269 /// the operands are implicitly truncated.270 BUILD_VECTOR,271 272 /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element273 /// at IDX replaced with VAL. If the type of VAL is larger than the vector274 /// element type then VAL is truncated before replacement.275 INSERT_VECTOR_ELT,276 277 /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR278 /// identified by the (potentially variable) element number IDX. If the279 /// return type is an integer type larger than the element type of the280 /// vector, the result is extended to the width of the return type.281 EXTRACT_VECTOR_ELT,282 283 /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of284 /// vector type with the same length and element type, this produces a285 /// concatenated vector result value, with length equal to the sum of the286 /// lengths of the input vectors.287 CONCAT_VECTORS,288 289 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an290 /// vector value) starting with the (potentially variable) element number291 /// IDX, which must be a multiple of the result vector length.292 EXTRACT_SUBVECTOR,293 294 /// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as295 /// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int296 /// values that indicate which value (or undef) each result element will297 /// get. These constant ints are accessible through the298 /// ShuffleVectorSDNode class. This is quite similar to the Altivec299 /// 'vperm' instruction, except that the indices must be constants and are300 /// in terms of the element size of VEC1/VEC2, not in terms of bytes.301 VECTOR_SHUFFLE,302 303 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a304 /// scalar value into element 0 of the resultant vector type. The top305 /// elements 1 to N-1 of the N-element vector are undefined. The type306 /// of the operand must match the vector element type, except when they307 /// are integer types. In this case the operand is allowed to be wider308 /// than the vector element type, and is implicitly truncated to it.309 SCALAR_TO_VECTOR,310 311 // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing312 // an unsigned/signed value of type i[2*N], then return the top part.313 MULHU, MULHS,314 315 // Bitwise operators - logical and, logical or, logical xor, shift left,316 // shift right algebraic (shift in sign bits), shift right logical (shift in317 // zeroes), rotate left, rotate right, and byteswap.318 AND, OR, XOR, SHL, SRA, SRL, ROTL, ROTR, BSWAP,319 320 // Counting operators321 CTTZ, CTLZ, CTPOP,322 323 // Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not324 // i1 then the high bits must conform to getBooleanContents.325 SELECT,326 327 // Select with condition operator - This selects between a true value and328 // a false value (ops #2 and #3) based on the boolean result of comparing329 // the lhs and rhs (ops #0 and #1) of a conditional expression with the330 // condition code in op #4, a CondCodeSDNode.331 SELECT_CC,332 333 // SetCC operator - This evaluates to a true value iff the condition is334 // true. If the result value type is not i1 then the high bits conform335 // to getBooleanContents. The operands to this are the left and right336 // operands to compare (ops #0, and #1) and the condition code to compare337 // them with (op #2) as a CondCodeSDNode.338 SETCC,339 340 // RESULT = VSETCC(LHS, RHS, COND) operator - This evaluates to a vector of341 // integer elements with all bits of the result elements set to true if the342 // comparison is true or all cleared if the comparison is false. The343 // operands to this are the left and right operands to compare (LHS/RHS) and344 // the condition code to compare them with (COND) as a CondCodeSDNode.345 VSETCC,346 347 // SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded348 // integer shift operations, just like ADD/SUB_PARTS. The operation349 // ordering is:350 // [Lo,Hi] = op [LoLHS,HiLHS], Amt351 SHL_PARTS, SRA_PARTS, SRL_PARTS,352 353 // Conversion operators. These are all single input single output354 // operations. For all of these, the result type must be strictly355 // wider or narrower (depending on the operation) than the source356 // type.357 358 // SIGN_EXTEND - Used for integer types, replicating the sign bit359 // into new bits.360 SIGN_EXTEND,361 362 // ZERO_EXTEND - Used for integer types, zeroing the new bits.363 ZERO_EXTEND,364 365 // ANY_EXTEND - Used for integer types. The high bits are undefined.366 ANY_EXTEND,367 368 // TRUNCATE - Completely drop the high bits.369 TRUNCATE,370 371 // [SU]INT_TO_FP - These operators convert integers (whose interpreted sign372 // depends on the first letter) to floating point.373 SINT_TO_FP,374 UINT_TO_FP,375 376 // SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to377 // sign extend a small value in a large integer register (e.g. sign378 // extending the low 8 bits of a 32-bit register to fill the top 24 bits379 // with the 7th bit). The size of the smaller type is indicated by the 1th380 // operand, a ValueType node.381 SIGN_EXTEND_INREG,382 383 /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned384 /// integer.385 FP_TO_SINT,386 FP_TO_UINT,387 388 /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type389 /// down to the precision of the destination VT. TRUNC is a flag, which is390 /// always an integer that is zero or one. If TRUNC is 0, this is a391 /// normal rounding, if it is 1, this FP_ROUND is known to not change the392 /// value of Y.393 ///394 /// The TRUNC = 1 case is used in cases where we know that the value will395 /// not be modified by the node, because Y is not using any of the extra396 /// precision of source type. This allows certain transformations like397 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for398 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.399 FP_ROUND,400 401 // FLT_ROUNDS_ - Returns current rounding mode:402 // -1 Undefined403 // 0 Round to 0404 // 1 Round to nearest405 // 2 Round to +inf406 // 3 Round to -inf407 FLT_ROUNDS_,408 409 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and410 /// rounds it to a floating point value. It then promotes it and returns it411 /// in a register of the same size. This operation effectively just412 /// discards excess precision. The type to round down to is specified by413 /// the VT operand, a VTSDNode.414 FP_ROUND_INREG,415 416 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.417 FP_EXTEND,418 419 // BIT_CONVERT - This operator converts between integer, vector and FP420 // values, as if the value was stored to memory with one type and loaded421 // from the same address with the other type (or equivalently for vector422 // format conversions, etc). The source and result are required to have423 // the same bit size (e.g. f32 <-> i32). This can also be used for424 // int-to-int or fp-to-fp conversions, but that is a noop, deleted by425 // getNode().426 BIT_CONVERT,427 428 // CONVERT_RNDSAT - This operator is used to support various conversions429 // between various types (float, signed, unsigned and vectors of those430 // types) with rounding and saturation. NOTE: Avoid using this operator as431 // most target don't support it and the operator might be removed in the432 // future. It takes the following arguments:433 // 0) value434 // 1) dest type (type to convert to)435 // 2) src type (type to convert from)436 // 3) rounding imm437 // 4) saturation imm438 // 5) ISD::CvtCode indicating the type of conversion to do439 CONVERT_RNDSAT,440 441 // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,442 // FLOG, FLOG2, FLOG10, FEXP, FEXP2,443 // FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR - Perform various unary floating444 // point operations. These are inspired by libm.445 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW,446 FLOG, FLOG2, FLOG10, FEXP, FEXP2,447 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR,448 449 // LOAD and STORE have token chains as their first operand, then the same450 // operands as an LLVM load/store instruction, then an offset node that451 // is added / subtracted from the base pointer to form the address (for452 // indexed memory ops).453 LOAD, STORE,454 455 // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned456 // to a specified boundary. This node always has two return values: a new457 // stack pointer value and a chain. The first operand is the token chain,458 // the second is the number of bytes to allocate, and the third is the459 // alignment boundary. The size is guaranteed to be a multiple of the stack460 // alignment, and the alignment is guaranteed to be bigger than the stack461 // alignment (if required) or 0 to get standard stack alignment.462 DYNAMIC_STACKALLOC,463 464 // Control flow instructions. These all have token chains.465 466 // BR - Unconditional branch. The first operand is the chain467 // operand, the second is the MBB to branch to.468 BR,469 470 // BRIND - Indirect branch. The first operand is the chain, the second471 // is the value to branch to, which must be of the same type as the target's472 // pointer type.473 BRIND,474 475 // BR_JT - Jumptable branch. The first operand is the chain, the second476 // is the jumptable index, the last one is the jumptable entry index.477 BR_JT,478 479 // BRCOND - Conditional branch. The first operand is the chain, the480 // second is the condition, the third is the block to branch to if the481 // condition is true. If the type of the condition is not i1, then the482 // high bits must conform to getBooleanContents.483 BRCOND,484 485 // BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in486 // that the condition is represented as condition code, and two nodes to487 // compare, rather than as a combined SetCC node. The operands in order are488 // chain, cc, lhs, rhs, block to branch to if condition is true.489 BR_CC,490 491 // INLINEASM - Represents an inline asm block. This node always has two492 // return values: a chain and a flag result. The inputs are as follows:493 // Operand #0 : Input chain.494 // Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.495 // Operand #2n+2: A RegisterNode.496 // Operand #2n+3: A TargetConstant, indicating if the reg is a use/def497 // Operand #last: Optional, an incoming flag.498 INLINEASM,499 500 // EH_LABEL - Represents a label in mid basic block used to track501 // locations needed for debug and exception handling tables. These nodes502 // take a chain as input and return a chain.503 EH_LABEL,504 505 // STACKSAVE - STACKSAVE has one operand, an input chain. It produces a506 // value, the same type as the pointer type for the system, and an output507 // chain.508 STACKSAVE,509 510 // STACKRESTORE has two operands, an input chain and a pointer to restore to511 // it returns an output chain.512 STACKRESTORE,513 514 // CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of515 // a call sequence, and carry arbitrary information that target might want516 // to know. The first operand is a chain, the rest are specified by the517 // target and not touched by the DAG optimizers.518 // CALLSEQ_START..CALLSEQ_END pairs may not be nested.519 CALLSEQ_START, // Beginning of a call sequence520 CALLSEQ_END, // End of a call sequence521 522 // VAARG - VAARG has three operands: an input chain, a pointer, and a523 // SRCVALUE. It returns a pair of values: the vaarg value and a new chain.524 VAARG,525 526 // VACOPY - VACOPY has five operands: an input chain, a destination pointer,527 // a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the528 // source.529 VACOPY,530 531 // VAEND, VASTART - VAEND and VASTART have three operands: an input chain, a532 // pointer, and a SRCVALUE.533 VAEND, VASTART,534 535 // SRCVALUE - This is a node type that holds a Value* that is used to536 // make reference to a value in the LLVM IR.537 SRCVALUE,538 539 // PCMARKER - This corresponds to the pcmarker intrinsic.540 PCMARKER,541 542 // READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.543 // The only operand is a chain and a value and a chain are produced. The544 // value is the contents of the architecture specific cycle counter like545 // register (or other high accuracy low latency clock source)546 READCYCLECOUNTER,547 548 // HANDLENODE node - Used as a handle for various purposes.549 HANDLENODE,550 551 // TRAMPOLINE - This corresponds to the init_trampoline intrinsic.552 // It takes as input a token chain, the pointer to the trampoline,553 // the pointer to the nested function, the pointer to pass for the554 // 'nest' parameter, a SRCVALUE for the trampoline and another for555 // the nested function (allowing targets to access the original556 // Function*). It produces the result of the intrinsic and a token557 // chain as output.558 TRAMPOLINE,559 560 // TRAP - Trapping instruction561 TRAP,562 563 // PREFETCH - This corresponds to a prefetch intrinsic. It takes chains are564 // their first operand. The other operands are the address to prefetch,565 // read / write specifier, and locality specifier.566 PREFETCH,567 568 // OUTCHAIN = MEMBARRIER(INCHAIN, load-load, load-store, store-load,569 // store-store, device)570 // This corresponds to the memory.barrier intrinsic.571 // it takes an input chain, 4 operands to specify the type of barrier, an572 // operand specifying if the barrier applies to device and uncached memory573 // and produces an output chain.574 MEMBARRIER,575 576 // Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)577 // this corresponds to the atomic.lcs intrinsic.578 // cmp is compared to *ptr, and if equal, swap is stored in *ptr.579 // the return is always the original value in *ptr580 ATOMIC_CMP_SWAP,581 582 // Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)583 // this corresponds to the atomic.swap intrinsic.584 // amt is stored to *ptr atomically.585 // the return is always the original value in *ptr586 ATOMIC_SWAP,587 588 // Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)589 // this corresponds to the atomic.load.[OpName] intrinsic.590 // op(*ptr, amt) is stored to *ptr atomically.591 // the return is always the original value in *ptr592 ATOMIC_LOAD_ADD,593 ATOMIC_LOAD_SUB,594 ATOMIC_LOAD_AND,595 ATOMIC_LOAD_OR,596 ATOMIC_LOAD_XOR,597 ATOMIC_LOAD_NAND,598 ATOMIC_LOAD_MIN,599 ATOMIC_LOAD_MAX,600 ATOMIC_LOAD_UMIN,601 ATOMIC_LOAD_UMAX,602 603 /// BUILTIN_OP_END - This must be the last enum value in this list.604 /// The target-specific pre-isel opcode values start here.605 BUILTIN_OP_END606 };607 608 /// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations609 /// which do not reference a specific memory location should be less than610 /// this value. Those that do must not be less than this value, and can611 /// be used with SelectionDAG::getMemIntrinsicNode.612 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+80;613 614 61 /// Node predicates 615 62 … … 626 73 /// element is not an undef. 627 74 bool isScalarToVector(const SDNode *N); 628 629 //===--------------------------------------------------------------------===// 630 /// MemIndexedMode enum - This enum defines the load / store indexed 631 /// addressing modes. 632 /// 633 /// UNINDEXED "Normal" load / store. The effective address is already 634 /// computed and is available in the base pointer. The offset 635 /// operand is always undefined. In addition to producing a 636 /// chain, an unindexed load produces one value (result of the 637 /// load); an unindexed store does not produce a value. 638 /// 639 /// PRE_INC Similar to the unindexed mode where the effective address is 640 /// PRE_DEC the value of the base pointer add / subtract the offset. 641 /// It considers the computation as being folded into the load / 642 /// store operation (i.e. the load / store does the address 643 /// computation as well as performing the memory transaction). 644 /// The base operand is always undefined. In addition to 645 /// producing a chain, pre-indexed load produces two values 646 /// (result of the load and the result of the address 647 /// computation); a pre-indexed store produces one value (result 648 /// of the address computation). 649 /// 650 /// POST_INC The effective address is the value of the base pointer. The 651 /// POST_DEC value of the offset operand is then added to / subtracted 652 /// from the base after memory transaction. In addition to 653 /// producing a chain, post-indexed load produces two values 654 /// (the result of the load and the result of the base +/- offset 655 /// computation); a post-indexed store produces one value (the 656 /// the result of the base +/- offset computation). 657 /// 658 enum MemIndexedMode { 659 UNINDEXED = 0, 660 PRE_INC, 661 PRE_DEC, 662 POST_INC, 663 POST_DEC, 664 LAST_INDEXED_MODE 665 }; 666 667 //===--------------------------------------------------------------------===// 668 /// LoadExtType enum - This enum defines the three variants of LOADEXT 669 /// (load with extension). 670 /// 671 /// SEXTLOAD loads the integer operand and sign extends it to a larger 672 /// integer result type. 673 /// ZEXTLOAD loads the integer operand and zero extends it to a larger 674 /// integer result type. 675 /// EXTLOAD is used for three things: floating point extending loads, 676 /// integer extending loads [the top bits are undefined], and vector 677 /// extending loads [load into low elt]. 678 /// 679 enum LoadExtType { 680 NON_EXTLOAD = 0, 681 EXTLOAD, 682 SEXTLOAD, 683 ZEXTLOAD, 684 LAST_LOADEXT_TYPE 685 }; 686 687 //===--------------------------------------------------------------------===// 688 /// ISD::CondCode enum - These are ordered carefully to make the bitfields 689 /// below work out, when considering SETFALSE (something that never exists 690 /// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered 691 /// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal 692 /// to. If the "N" column is 1, the result of the comparison is undefined if 693 /// the input is a NAN. 694 /// 695 /// All of these (except for the 'always folded ops') should be handled for 696 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, 697 /// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used. 698 /// 699 /// Note that these are laid out in a specific order to allow bit-twiddling 700 /// to transform conditions. 701 enum CondCode { 702 // Opcode N U L G E Intuitive operation 703 SETFALSE, // 0 0 0 0 Always false (always folded) 704 SETOEQ, // 0 0 0 1 True if ordered and equal 705 SETOGT, // 0 0 1 0 True if ordered and greater than 706 SETOGE, // 0 0 1 1 True if ordered and greater than or equal 707 SETOLT, // 0 1 0 0 True if ordered and less than 708 SETOLE, // 0 1 0 1 True if ordered and less than or equal 709 SETONE, // 0 1 1 0 True if ordered and operands are unequal 710 SETO, // 0 1 1 1 True if ordered (no nans) 711 SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y) 712 SETUEQ, // 1 0 0 1 True if unordered or equal 713 SETUGT, // 1 0 1 0 True if unordered or greater than 714 SETUGE, // 1 0 1 1 True if unordered, greater than, or equal 715 SETULT, // 1 1 0 0 True if unordered or less than 716 SETULE, // 1 1 0 1 True if unordered, less than, or equal 717 SETUNE, // 1 1 1 0 True if unordered or not equal 718 SETTRUE, // 1 1 1 1 Always true (always folded) 719 // Don't care operations: undefined if the input is a nan. 720 SETFALSE2, // 1 X 0 0 0 Always false (always folded) 721 SETEQ, // 1 X 0 0 1 True if equal 722 SETGT, // 1 X 0 1 0 True if greater than 723 SETGE, // 1 X 0 1 1 True if greater than or equal 724 SETLT, // 1 X 1 0 0 True if less than 725 SETLE, // 1 X 1 0 1 True if less than or equal 726 SETNE, // 1 X 1 1 0 True if not equal 727 SETTRUE2, // 1 X 1 1 1 Always true (always folded) 728 729 SETCC_INVALID // Marker value. 730 }; 731 732 /// isSignedIntSetCC - Return true if this is a setcc instruction that 733 /// performs a signed comparison when used with integer operands. 734 inline bool isSignedIntSetCC(CondCode Code) { 735 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; 736 } 737 738 /// isUnsignedIntSetCC - Return true if this is a setcc instruction that 739 /// performs an unsigned comparison when used with integer operands. 740 inline bool isUnsignedIntSetCC(CondCode Code) { 741 return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE; 742 } 743 744 /// isTrueWhenEqual - Return true if the specified condition returns true if 745 /// the two operands to the condition are equal. Note that if one of the two 746 /// operands is a NaN, this value is meaningless. 747 inline bool isTrueWhenEqual(CondCode Cond) { 748 return ((int)Cond & 1) != 0; 749 } 750 751 /// getUnorderedFlavor - This function returns 0 if the condition is always 752 /// false if an operand is a NaN, 1 if the condition is always true if the 753 /// operand is a NaN, and 2 if the condition is undefined if the operand is a 754 /// NaN. 755 inline unsigned getUnorderedFlavor(CondCode Cond) { 756 return ((int)Cond >> 3) & 3; 757 } 758 759 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where 760 /// 'op' is a valid SetCC operation. 761 CondCode getSetCCInverse(CondCode Operation, bool isInteger); 762 763 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 764 /// when given the operation for (X op Y). 765 CondCode getSetCCSwappedOperands(CondCode Operation); 766 767 /// getSetCCOrOperation - Return the result of a logical OR between different 768 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This 769 /// function returns SETCC_INVALID if it is not possible to represent the 770 /// resultant comparison. 771 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger); 772 773 /// getSetCCAndOperation - Return the result of a logical AND between 774 /// different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 775 /// function returns SETCC_INVALID if it is not possible to represent the 776 /// resultant comparison. 777 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger); 778 779 //===--------------------------------------------------------------------===// 780 /// CvtCode enum - This enum defines the various converts CONVERT_RNDSAT 781 /// supports. 782 enum CvtCode { 783 CVT_FF, // Float from Float 784 CVT_FS, // Float from Signed 785 CVT_FU, // Float from Unsigned 786 CVT_SF, // Signed from Float 787 CVT_UF, // Unsigned from Float 788 CVT_SS, // Signed from Signed 789 CVT_SU, // Signed from Unsigned 790 CVT_US, // Unsigned from Signed 791 CVT_UU, // Unsigned from Unsigned 792 CVT_INVALID // Marker - Invalid opcode 793 }; 794 } // end llvm::ISD namespace 795 75 } // end llvm:ISD namespace 796 76 797 77 //===----------------------------------------------------------------------===// … … 1270 550 } 1271 551 552 /// getFlaggedUser - If this node has a flag value with a user, return 553 /// the user (there is at most one). Otherwise return NULL. 554 SDNode *getFlaggedUser() const { 555 for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI) 556 if (UI.getUse().get().getValueType() == MVT::Flag) 557 return *UI; 558 return 0; 559 } 560 1272 561 /// getNumValues - Return the number of values defined/returned by this 1273 562 /// operator. … … 1384 673 /// set later with InitOperands. 1385 674 SDNode(unsigned Opc, const DebugLoc dl, SDVTList VTs) 1386 : NodeType(Opc), OperandsNeedDelete(false), SubclassData(0),1387 NodeId(-1), OperandList(0), ValueList(VTs.VTs), UseList(NULL),1388 NumOperands(0), NumValues(VTs.NumVTs),675 : NodeType(Opc), OperandsNeedDelete(false), HasDebugValue(false), 676 SubclassData(0), NodeId(-1), OperandList(0), ValueList(VTs.VTs), 677 UseList(NULL), NumOperands(0), NumValues(VTs.NumVTs), 1389 678 debugLoc(dl) {} 1390 679 … … 1558 847 // FIXME: Remove the "noinline" attribute once <rdar://problem/5852746> is 1559 848 // fixed. 1560 #if def __GNUC__849 #if __GNUC__==4 && __GNUC_MINOR__==2 && defined(__APPLE__) && !defined(__llvm__) 1561 850 explicit __attribute__((__noinline__)) HandleSDNode(SDValue X) 1562 851 #else 1563 852 explicit HandleSDNode(SDValue X) 1564 853 #endif 1565 : SDNode(ISD::HANDLENODE, DebugLoc::getUnknownLoc(), 1566 getSDVTList(MVT::Other)) { 854 : SDNode(ISD::HANDLENODE, DebugLoc(), getSDVTList(MVT::Other)) { 1567 855 InitOperands(&Op, X); 1568 856 } … … 1795 1083 ConstantSDNode(bool isTarget, const ConstantInt *val, EVT VT) 1796 1084 : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 1797 DebugLoc ::getUnknownLoc(), getSDVTList(VT)), Value(val) {1085 DebugLoc(), getSDVTList(VT)), Value(val) { 1798 1086 } 1799 1087 public: … … 1804 1092 int64_t getSExtValue() const { return Value->getSExtValue(); } 1805 1093 1094 bool isOne() const { return Value->isOne(); } 1806 1095 bool isNullValue() const { return Value->isNullValue(); } 1807 1096 bool isAllOnesValue() const { return Value->isAllOnesValue(); } … … 1819 1108 ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT) 1820 1109 : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, 1821 DebugLoc ::getUnknownLoc(), getSDVTList(VT)), Value(val) {1110 DebugLoc(), getSDVTList(VT)), Value(val) { 1822 1111 } 1823 1112 public: … … 1852 1141 bool isExactlyValue(const APFloat& V) const; 1853 1142 1854 bool isValueValidForType(EVT VT, const APFloat& Val);1143 static bool isValueValidForType(EVT VT, const APFloat& Val); 1855 1144 1856 1145 static bool classof(const ConstantFPSDNode *) { return true; } … … 1862 1151 1863 1152 class GlobalAddressSDNode : public SDNode { 1864 GlobalValue *TheGlobal;1153 const GlobalValue *TheGlobal; 1865 1154 int64_t Offset; 1866 1155 unsigned char TargetFlags; 1867 1156 friend class SelectionDAG; 1868 GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, EVT VT,1157 GlobalAddressSDNode(unsigned Opc, DebugLoc DL, const GlobalValue *GA, EVT VT, 1869 1158 int64_t o, unsigned char TargetFlags); 1870 1159 public: 1871 1160 1872 GlobalValue *getGlobal() const { return TheGlobal; }1161 const GlobalValue *getGlobal() const { return TheGlobal; } 1873 1162 int64_t getOffset() const { return Offset; } 1874 1163 unsigned char getTargetFlags() const { return TargetFlags; } … … 1890 1179 FrameIndexSDNode(int fi, EVT VT, bool isTarg) 1891 1180 : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex, 1892 DebugLoc ::getUnknownLoc(), getSDVTList(VT)), FI(fi) {1181 DebugLoc(), getSDVTList(VT)), FI(fi) { 1893 1182 } 1894 1183 public: … … 1909 1198 JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned char TF) 1910 1199 : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable, 1911 DebugLoc ::getUnknownLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {1200 DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) { 1912 1201 } 1913 1202 public: … … 1925 1214 class ConstantPoolSDNode : public SDNode { 1926 1215 union { 1927 Constant *ConstVal;1216 const Constant *ConstVal; 1928 1217 MachineConstantPoolValue *MachineCPVal; 1929 1218 } Val; … … 1932 1221 unsigned char TargetFlags; 1933 1222 friend class SelectionDAG; 1934 ConstantPoolSDNode(bool isTarget, Constant *c, EVT VT, int o, unsigned Align,1935 unsigned char TF)1223 ConstantPoolSDNode(bool isTarget, const Constant *c, EVT VT, int o, 1224 unsigned Align, unsigned char TF) 1936 1225 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 1937 DebugLoc ::getUnknownLoc(),1226 DebugLoc(), 1938 1227 getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) { 1939 1228 assert((int)Offset >= 0 && "Offset is too large"); … … 1943 1232 EVT VT, int o, unsigned Align, unsigned char TF) 1944 1233 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 1945 DebugLoc ::getUnknownLoc(),1234 DebugLoc(), 1946 1235 getSDVTList(VT)), Offset(o), Alignment(Align), TargetFlags(TF) { 1947 1236 assert((int)Offset >= 0 && "Offset is too large"); … … 1956 1245 } 1957 1246 1958 Constant *getConstVal() const {1247 const Constant *getConstVal() const { 1959 1248 assert(!isMachineConstantPoolEntry() && "Wrong constantpool type"); 1960 1249 return Val.ConstVal; … … 1991 1280 /// harder. Let's see if we need it first. 1992 1281 explicit BasicBlockSDNode(MachineBasicBlock *mbb) 1993 : SDNode(ISD::BasicBlock, DebugLoc::getUnknownLoc(), 1994 getSDVTList(MVT::Other)), MBB(mbb) { 1282 : SDNode(ISD::BasicBlock, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb) { 1995 1283 } 1996 1284 public: … … 2038 1326 /// Create a SrcValue for a general value. 2039 1327 explicit SrcValueSDNode(const Value *v) 2040 : SDNode(ISD::SRCVALUE, DebugLoc::getUnknownLoc(), 2041 getSDVTList(MVT::Other)), V(v) {} 1328 : SDNode(ISD::SRCVALUE, DebugLoc(), getSDVTList(MVT::Other)), V(v) {} 2042 1329 2043 1330 public: … … 2050 1337 } 2051 1338 }; 1339 1340 class MDNodeSDNode : public SDNode { 1341 const MDNode *MD; 1342 friend class SelectionDAG; 1343 explicit MDNodeSDNode(const MDNode *md) 1344 : SDNode(ISD::MDNODE_SDNODE, DebugLoc(), getSDVTList(MVT::Other)), MD(md) {} 1345 public: 1346 1347 const MDNode *getMD() const { return MD; } 1348 1349 static bool classof(const MDNodeSDNode *) { return true; } 1350 static bool classof(const SDNode *N) { 1351 return N->getOpcode() == ISD::MDNODE_SDNODE; 1352 } 1353 }; 2052 1354 2053 1355 … … 2056 1358 friend class SelectionDAG; 2057 1359 RegisterSDNode(unsigned reg, EVT VT) 2058 : SDNode(ISD::Register, DebugLoc::getUnknownLoc(), 2059 getSDVTList(VT)), Reg(reg) { 1360 : SDNode(ISD::Register, DebugLoc(), getSDVTList(VT)), Reg(reg) { 2060 1361 } 2061 1362 public: … … 2070 1371 2071 1372 class BlockAddressSDNode : public SDNode { 2072 BlockAddress *BA;1373 const BlockAddress *BA; 2073 1374 unsigned char TargetFlags; 2074 1375 friend class SelectionDAG; 2075 BlockAddressSDNode(unsigned NodeTy, EVT VT, BlockAddress *ba,1376 BlockAddressSDNode(unsigned NodeTy, EVT VT, const BlockAddress *ba, 2076 1377 unsigned char Flags) 2077 : SDNode(NodeTy, DebugLoc ::getUnknownLoc(), getSDVTList(VT)),1378 : SDNode(NodeTy, DebugLoc(), getSDVTList(VT)), 2078 1379 BA(ba), TargetFlags(Flags) { 2079 1380 } 2080 1381 public: 2081 BlockAddress *getBlockAddress() const { return BA; }1382 const BlockAddress *getBlockAddress() const { return BA; } 2082 1383 unsigned char getTargetFlags() const { return TargetFlags; } 2083 1384 … … 2089 1390 }; 2090 1391 2091 class LabelSDNode : public SDNode {1392 class EHLabelSDNode : public SDNode { 2092 1393 SDUse Chain; 2093 unsigned LabelID;2094 friend class SelectionDAG; 2095 LabelSDNode(unsigned NodeTy, DebugLoc dl, SDValue ch, unsigned id)2096 : SDNode( NodeTy, dl, getSDVTList(MVT::Other)), LabelID(id) {1394 MCSymbol *Label; 1395 friend class SelectionDAG; 1396 EHLabelSDNode(DebugLoc dl, SDValue ch, MCSymbol *L) 1397 : SDNode(ISD::EH_LABEL, dl, getSDVTList(MVT::Other)), Label(L) { 2097 1398 InitOperands(&Chain, ch); 2098 1399 } 2099 1400 public: 2100 unsigned getLabelID() const { return LabelID; }2101 2102 static bool classof(const LabelSDNode *) { return true; }1401 MCSymbol *getLabel() const { return Label; } 1402 1403 static bool classof(const EHLabelSDNode *) { return true; } 2103 1404 static bool classof(const SDNode *N) { 2104 1405 return N->getOpcode() == ISD::EH_LABEL; … … 2113 1414 ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned char TF, EVT VT) 2114 1415 : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 2115 DebugLoc::getUnknownLoc(), 2116 getSDVTList(VT)), Symbol(Sym), TargetFlags(TF) { 1416 DebugLoc(), getSDVTList(VT)), Symbol(Sym), TargetFlags(TF) { 2117 1417 } 2118 1418 public: … … 2132 1432 friend class SelectionDAG; 2133 1433 explicit CondCodeSDNode(ISD::CondCode Cond) 2134 : SDNode(ISD::CONDCODE, DebugLoc ::getUnknownLoc(),2135 getSDVTList(MVT::Other)),Condition(Cond) {1434 : SDNode(ISD::CONDCODE, DebugLoc(), getSDVTList(MVT::Other)), 1435 Condition(Cond) { 2136 1436 } 2137 1437 public: … … 2165 1465 }; 2166 1466 2167 namespace ISD {2168 struct ArgFlagsTy {2169 private:2170 static const uint64_t NoFlagSet = 0ULL;2171 static const uint64_t ZExt = 1ULL<<0; ///< Zero extended2172 static const uint64_t ZExtOffs = 0;2173 static const uint64_t SExt = 1ULL<<1; ///< Sign extended2174 static const uint64_t SExtOffs = 1;2175 static const uint64_t InReg = 1ULL<<2; ///< Passed in register2176 static const uint64_t InRegOffs = 2;2177 static const uint64_t SRet = 1ULL<<3; ///< Hidden struct-ret ptr2178 static const uint64_t SRetOffs = 3;2179 static const uint64_t ByVal = 1ULL<<4; ///< Struct passed by value2180 static const uint64_t ByValOffs = 4;2181 static const uint64_t Nest = 1ULL<<5; ///< Nested fn static chain2182 static const uint64_t NestOffs = 5;2183 static const uint64_t ByValAlign = 0xFULL << 6; //< Struct alignment2184 static const uint64_t ByValAlignOffs = 6;2185 static const uint64_t Split = 1ULL << 10;2186 static const uint64_t SplitOffs = 10;2187 static const uint64_t OrigAlign = 0x1FULL<<27;2188 static const uint64_t OrigAlignOffs = 27;2189 static const uint64_t ByValSize = 0xffffffffULL << 32; //< Struct size2190 static const uint64_t ByValSizeOffs = 32;2191 2192 static const uint64_t One = 1ULL; //< 1 of this type, for shifts2193 2194 uint64_t Flags;2195 public:2196 ArgFlagsTy() : Flags(0) { }2197 2198 bool isZExt() const { return Flags & ZExt; }2199 void setZExt() { Flags |= One << ZExtOffs; }2200 2201 bool isSExt() const { return Flags & SExt; }2202 void setSExt() { Flags |= One << SExtOffs; }2203 2204 bool isInReg() const { return Flags & InReg; }2205 void setInReg() { Flags |= One << InRegOffs; }2206 2207 bool isSRet() const { return Flags & SRet; }2208 void setSRet() { Flags |= One << SRetOffs; }2209 2210 bool isByVal() const { return Flags & ByVal; }2211 void setByVal() { Flags |= One << ByValOffs; }2212 2213 bool isNest() const { return Flags & Nest; }2214 void setNest() { Flags |= One << NestOffs; }2215 2216 unsigned getByValAlign() const {2217 return (unsigned)2218 ((One << ((Flags & ByValAlign) >> ByValAlignOffs)) / 2);2219 }2220 void setByValAlign(unsigned A) {2221 Flags = (Flags & ~ByValAlign) |2222 (uint64_t(Log2_32(A) + 1) << ByValAlignOffs);2223 }2224 2225 bool isSplit() const { return Flags & Split; }2226 void setSplit() { Flags |= One << SplitOffs; }2227 2228 unsigned getOrigAlign() const {2229 return (unsigned)2230 ((One << ((Flags & OrigAlign) >> OrigAlignOffs)) / 2);2231 }2232 void setOrigAlign(unsigned A) {2233 Flags = (Flags & ~OrigAlign) |2234 (uint64_t(Log2_32(A) + 1) << OrigAlignOffs);2235 }2236 2237 unsigned getByValSize() const {2238 return (unsigned)((Flags & ByValSize) >> ByValSizeOffs);2239 }2240 void setByValSize(unsigned S) {2241 Flags = (Flags & ~ByValSize) | (uint64_t(S) << ByValSizeOffs);2242 }2243 2244 /// getArgFlagsString - Returns the flags as a string, eg: "zext align:4".2245 std::string getArgFlagsString();2246 2247 /// getRawBits - Represent the flags as a bunch of bits.2248 uint64_t getRawBits() const { return Flags; }2249 };2250 2251 /// InputArg - This struct carries flags and type information about a2252 /// single incoming (formal) argument or incoming (from the perspective2253 /// of the caller) return value virtual register.2254 ///2255 struct InputArg {2256 ArgFlagsTy Flags;2257 EVT VT;2258 bool Used;2259 2260 InputArg() : VT(MVT::Other), Used(false) {}2261 InputArg(ISD::ArgFlagsTy flags, EVT vt, bool used)2262 : Flags(flags), VT(vt), Used(used) {2263 assert(VT.isSimple() &&2264 "InputArg value type must be Simple!");2265 }2266 };2267 2268 /// OutputArg - This struct carries flags and a value for a2269 /// single outgoing (actual) argument or outgoing (from the perspective2270 /// of the caller) return value virtual register.2271 ///2272 struct OutputArg {2273 ArgFlagsTy Flags;2274 SDValue Val;2275 bool IsFixed;2276 2277 OutputArg() : IsFixed(false) {}2278 OutputArg(ISD::ArgFlagsTy flags, SDValue val, bool isfixed)2279 : Flags(flags), Val(val), IsFixed(isfixed) {2280 assert(Val.getValueType().isSimple() &&2281 "OutputArg value type must be Simple!");2282 }2283 };2284 }2285 2286 1467 /// VTSDNode - This class is used to represent EVT's, which are used 2287 1468 /// to parameterize some operations. … … 2290 1471 friend class SelectionDAG; 2291 1472 explicit VTSDNode(EVT VT) 2292 : SDNode(ISD::VALUETYPE, DebugLoc ::getUnknownLoc(),2293 getSDVTList(MVT::Other)),ValueType(VT) {1473 : SDNode(ISD::VALUETYPE, DebugLoc(), getSDVTList(MVT::Other)), 1474 ValueType(VT) { 2294 1475 } 2295 1476 public: … … 2587 1768 } 2588 1769 2589 2590 1770 } // end llvm namespace 2591 1771
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