Changeset 1973 for binutils/trunk/ld/testsuite/ld-powerpc/tlsso32.d
- Timestamp:
- Feb 6, 2017, 1:00:00 PM (8 years ago)
- Location:
- binutils/trunk
- Files:
-
- 2 edited
-
. (modified) (1 prop)
-
ld/testsuite/ld-powerpc/tlsso32.d (modified) (1 diff)
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- Added
- Removed
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binutils/trunk ¶
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Property svn:mergeinfo
set to
/binutils/vendor/current merged eligible
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Property svn:mergeinfo
set to
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TabularUnified binutils/trunk/ld/testsuite/ld-powerpc/tlsso32.d ¶
r970 r1973 10 10 11 11 .* <_start>: 12 .*: (38 7f ff e0|e0 ff 7f 38) addi r3,r31,-32 12 .*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4> 13 .*: (7f c8 02 a6|a6 02 c8 7f) mflr r30 14 .*: (3f de 00 02|02 00 de 3f) addis r30,r30,2 15 .*: (3b de 80 e8|e8 80 de 3b) addi r30,r30,-32536 16 .*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28 13 17 .*: (48 00 00 01|01 00 00 48) bl .* 14 .*: (38 7f ff f 4|f4 ff 7f 38) addi r3,r31,-1218 .*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8 15 19 .*: (48 00 00 01|01 00 00 48) bl .* 16 .*: (38 7f ff e 8|e8 ff 7f 38) addi r3,r31,-2417 .*: (48 0 1 01 95|95 01 01 48) bl .*<__tls_get_addr@plt>18 .*: (38 7f ff f 4|f4 ff 7f 38) addi r3,r31,-1219 .*: (48 0 1 01 8d|8d 01 01 48) bl .*<__tls_get_addr@plt>20 .*: (38 7f ff ec|ec ff 7f 38) addi r3,r31,-20 21 .*: (48 00 00 5d|5d 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr> 22 .*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8 23 .*: (48 00 00 55|55 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr> 20 24 .*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736 21 25 .*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0 22 26 .*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\) 23 .*: (81 3f ff f 0|f0 ff 3f 81) lwz r9,-16\(r31\)27 .*: (81 3f ff f4|f4 ff 3f 81) lwz r9,-12\(r31\) 24 28 .*: (7d 49 12 2e|2e 12 49 7d) lhzx r10,r9,r2 25 29 .*: (89 42 00 00|00 00 42 89) lbz r10,0\(r2\) 26 30 .*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0 27 31 .*: (99 49 00 00|00 00 49 99) stb r10,0\(r9\) 28 .*: (38 7e ff d 8|d8 ff 7e 38) addi r3,r30,-4032 .*: (38 7e ff dc|dc ff 7e 38) addi r3,r30,-36 29 33 .*: (48 00 00 01|01 00 00 48) bl .* 30 .*: (38 7e ff f 4|f4 ff 7e 38) addi r3,r30,-1234 .*: (38 7e ff f8|f8 ff 7e 38) addi r3,r30,-8 31 35 .*: (48 00 00 01|01 00 00 48) bl .* 32 36 .*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\) 33 37 .*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0 34 38 .*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\) 35 .*: (81 3e ff f 0|f0 ff 3e 81) lwz r9,-16\(r30\)39 .*: (81 3e ff f4|f4 ff 3e 81) lwz r9,-12\(r30\) 36 40 .*: (7d 49 13 2e|2e 13 49 7d) sthx r10,r9,r2 37 41 .*: (a1 42 00 00|00 00 42 a1) lhz r10,0\(r2\) 38 42 .*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0 39 43 .*: (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\) 40 Disassembly of section \.got:41 44 42 .* <_GLOBAL_OFFSET_TABLE_-0x28>: 43 #... 44 .*: (4e 80 00 21|21 00 80 4e) blrl 45 .* <_GLOBAL_OFFSET_TABLE_>: 46 .*: (00 01 03 ec|ec 03 01 00) .* 47 #pass 45 .* <00008000.got2.plt_pic32.__tls_get_addr>: 46 .*: (81 7e 80 d8|d8 80 7e 81) lwz r11,-32552\(r30\) 47 .*: (7d 69 03 a6|a6 03 69 7d) mtctr r11 48 .*: (4e 80 04 20|20 04 80 4e) bctr 49 .*: (60 00 00 00|00 00 00 60) nop 50 51 .* <__glink>: 52 .*: (3d 6b 00 00|00 00 6b 3d) addis r11,r11,0 53 .*: (7c 08 02 a6|a6 02 08 7c) mflr r0 54 .*: (42 9f 00 05|05 00 9f 42) bcl .* <__glink\+0xc> 55 .*: (39 6b 00 0c|0c 00 6b 39) addi r11,r11,12 56 .*: (7d 88 02 a6|a6 02 88 7d) mflr r12 57 .*: (7c 08 03 a6|a6 03 08 7c) mtlr r0 58 .*: (7d 6c 58 50|50 58 6c 7d) subf r11,r12,r11 59 .*: (3d 8c 00 01|01 00 8c 3d) addis r12,r12,1 60 .*: (80 0c 01 20|20 01 0c 80) lwz r0,288\(r12\) 61 .*: (81 8c 01 24|24 01 8c 81) lwz r12,292\(r12\) 62 .*: (7c 09 03 a6|a6 03 09 7c) mtctr r0 63 .*: (7c 0b 5a 14|14 5a 0b 7c) add r0,r11,r11 64 .*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11 65 .*: (4e 80 04 20|20 04 80 4e) bctr 66 .*: (60 00 00 00|00 00 00 60) nop 67 .*: (60 00 00 00|00 00 00 60) nop
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