Opened 18 years ago
Closed 18 years ago
#8 closed defect (fixed)
IRQ handling with interrupts > 48
Reported by: | ktk | Owned by: | pasha |
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Priority: | major | Milestone: | Release version 3.08 |
Component: | ACPI PSD | Version: | |
Keywords: | Cc: |
Description
OS/2 supports no more than 48 IRQs (tested with SetIRQ and setup of PSD) More and more users come with motherboards equipped with 3 or 4 I/O APIC x 24 IRQ > 72 IRQs or more.
How can we handle that?
Change History (3)
comment:1 by , 18 years ago
comment:2 by , 18 years ago
Last part of the comment is a question/idea by Daniela:
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A4: If a PC operates with many IRQs then we must support all IRQs.
The kernel supports 48 IRQs.
- 3 are used for SMP launch
- you can forward groups of IRQs (8 in one group), not alone IRQ.
- In APIC mode all PCI devices jump > IRQ15
So, (48 - 3 - 15) /8 = 3. Only 3 devices may be reconfigured.
What about using the APIC interrupt vector tables? Each APIC can assign individual interrupt vector numbers to interrupt input pins. AFAIK nobody prevents assigning the same interrupt vector number to multiple interrupt inputs.
comment:3 by , 18 years ago
Resolution: | → fixed |
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Status: | new → closed |
Adding REMAP in ACPI snooper. So IRQ > 48 can be remap to IRQ < 48
ACPI can reroute interrupts so the question is can we handle it like this.