Changeset 316


Ignore:
Timestamp:
Feb 15, 2012, 7:20:00 PM (9 years ago)
Author:
dmik
Message:

Narrow down the operand constraint for XCHGB instruction.

This is necessary to prevent GCC from selecting DIL (the low byte of EDI)
as the operand to XCHGB since DIL is not available in 32-bit CPU mode
(GAS would complain).

See http://gcc.gnu.org/bugzilla/show_bug.cgl?id=10153 for details of why
GCC can't do it on its own.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/openjdk/hotspot/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp

    r309 r316  
    9494inline void     OrderAccess::store_fence(jbyte*  p, jbyte  v) {
    9595  __asm__ volatile (  "xchgb (%2),%0"
    96                     : "=r" (v)
     96                    : "=q" (v)
    9797                    : "0" (v), "r" (p)
    9898                    : "memory");
     
    156156inline void     OrderAccess::release_store_fence(volatile jbyte*  p, jbyte  v) {
    157157  __asm__ volatile (  "xchgb (%2),%0"
    158                     : "=r" (v)
     158                    : "=q" (v)
    159159                    : "0" (v), "r" (p)
    160160                    : "memory");
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