Ticket #550: rwalsh.acpi-tree

File rwalsh.acpi-tree, 51.9 KB (added by Rich Walsh, 13 years ago)
Line 
1******** ACPI Tree test Programm *********
2Test AcpiWalkNameSpace
3@
4|
5+*_GPE T:[Scope]
6 |
7 +*_L07 T:[Method]
8 |
9 +*_L1B T:[Method]
10 |
11 +*_L09 T:[Method]
12 |
13 +*_L1D T:[Method]
14 |
15 +*_L08 T:[Method]
16 |
17 +*_L03 T:[Method]
18 |
19 +*_L04 T:[Method]
20 |
21 +*_L0C T:[Method]
22 |
23 +*_L20 T:[Method]
24 |
25 +*_L0E T:[Method]
26 |
27 +*_L05 T:[Method]
28 |
29 +*_L0D T:[Method]
30 |
31 +*_L0B T:[Method]
32 |
33 +*_L06 T:[Method]
34|
35+*_PR_ T:[Scope]
36 |
37 +*SSDT T:[Region]
38 |
39 +*DCOR T:[Integer]
40 |
41 +*NCST T:[Integer]
42 |
43 +*NPSS T:[Integer]
44 |
45 +*HNDL T:[Integer]
46 |
47 +*CINT T:[Integer]
48 |
49 +*APSS T:[Package]
50 |
51 +*C1ST T:[Package]
52 |
53 +*C2ST T:[Package]
54 |
55 +*C3ST T:[Package]
56 |
57 +*C4ST T:[Package]
58 |
59 +*CPU1 T:[Processor] STA:[0xffffffff]
60 |
61 +*TYPE T:[Integer]
62 |
63 +*_PDC T:[Method]
64 |
65 +*_CST T:[Method]
66 |
67 +*CPU2 T:[Processor] STA:[0xffffffff]
68 |
69 +*TYPE T:[Integer]
70 |
71 +*_PDC T:[Method]
72 |
73 +*_CST T:[Method]
74 |
75 +*CPU3 T:[Processor] STA:[0xffffffff]
76 |
77 +*TYPE T:[Integer]
78 |
79 +*_PDC T:[Method]
80 |
81 +*_CST T:[Method]
82 |
83 +*CPU4 T:[Processor] STA:[0xffffffff]
84 |
85 +*TYPE T:[Integer]
86 |
87 +*_PDC T:[Method]
88 |
89 +*_CST T:[Method]
90 |
91 +*CPU5 T:[Processor] STA:[0xffffffff]
92 |
93 +*TYPE T:[Integer]
94 |
95 +*_PDC T:[Method]
96 |
97 +*_CST T:[Method]
98 |
99 +*CPU6 T:[Processor] STA:[0xffffffff]
100 |
101 +*TYPE T:[Integer]
102 |
103 +*_PDC T:[Method]
104 |
105 +*_CST T:[Method]
106 |
107 +*CPU7 T:[Processor] STA:[0xffffffff]
108 |
109 +*TYPE T:[Integer]
110 |
111 +*_PDC T:[Method]
112 |
113 +*_CST T:[Method]
114 |
115 +*CPU8 T:[Processor] STA:[0xffffffff]
116 |
117 +*TYPE T:[Integer]
118 |
119 +*_PDC T:[Method]
120 |
121 +*_CST T:[Method]
122|
123+*_SB_ T:[Device] STA:[0xffffffff]
124 Current state:
125 Possible State:
126 |
127 +*PR00 T:[Package]
128 |
129 +*AR00 T:[Package]
130 |
131 +*PR02 T:[Package]
132 |
133 +*AR02 T:[Package]
134 |
135 +*PR04 T:[Package]
136 |
137 +*AR04 T:[Package]
138 |
139 +*PR05 T:[Package]
140 |
141 +*AR05 T:[Package]
142 |
143 +*PR06 T:[Package]
144 |
145 +*AR06 T:[Package]
146 |
147 +*PR07 T:[Package]
148 |
149 +*AR07 T:[Package]
150 |
151 +*PR08 T:[Package]
152 |
153 +*AR08 T:[Package]
154 |
155 +*PRSA T:[Buffer]
156 |
157 +*PRSB T:[Alias]
158 |
159 +*PRSC T:[Buffer]
160 |
161 +*PRSD T:[Alias]
162 |
163 +*PRSE T:[Alias]
164 |
165 +*PRSF T:[Alias]
166 |
167 +*PRSG T:[Alias]
168 |
169 +*PRSH T:[Alias]
170 |
171 +*PCI0 T:[Device] HID:[PNP0A08] CID:[PNP0A08] UID:[0] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:03:ff]
172 Current state:
173 > ADDRESS16:[2 0x0 Len:256]
174 > IO:[1 0xcf8 - 0xcf8 Al:1 Len:8]
175 > ADDRESS16:[1 0x0 Len:3320]
176 > ADDRESS16:[1 0xd00 Len:62208]
177 > ADDRESS32:[0 0xa0000 Len:131072]
178 > ADDRESS32:[0 0x0 Len:0]
179 > ADDRESS32:[0 0x7e000000 Len:-2113929216]
180 > ENDTAG
181 Possible State:
182 |
183 +*_HID T:[Integer]
184 |
185 +*_CID T:[Integer]
186 |
187 +*_ADR T:[Integer]
188 |
189 +*_BBN T:[Method]
190 |
191 +*_UID T:[Integer]
192 |
193 +*_PRT T:[Method]
194 |
195 +*_S3D T:[Method]
196 |
197 +*MCH_ T:[Device] HID:[PNP0C01] UID:[10] STA:[0xffffffff]
198 Current state:
199 > FIXED-MEM32:[1 0xfed14000 Len:24576]
200 > FIXED-MEM32:[1 0xe0000000 Len:268435456]
201 > ENDTAG
202 Possible State:
203 |
204 +*_HID T:[Integer]
205 |
206 +*_UID T:[Integer]
207 |
208 +*MCHR T:[Buffer]
209 |
210 +*_CRS T:[Method]
211 |
212 +*NPTS T:[Method]
213 |
214 +*NWAK T:[Method]
215 |
216 +*P0P1 T:[Device] ADR:[0x10000] STA:[0xffffffff]
217 Current state:
218 Possible State:
219 |
220 +*_ADR T:[Integer]
221 |
222 +*_PRW T:[Method]
223 |
224 +*SBRG T:[Device] ADR:[0x1f0000] STA:[0xffffffff]
225 Current state:
226 Possible State:
227 |
228 +*_ADR T:[Integer]
229 |
230 +*SPTS T:[Method]
231 |
232 +*SWAK T:[Method]
233 |
234 +*APMP T:[Region]
235 |
236 +*APMC T:[RegionField]
237 |
238 +*APMS T:[RegionField]
239 |
240 +*BRTC T:[RegionField]
241 |
242 +*SMIE T:[Region]
243 |
244 +*PS1E T:[RegionField]
245 |
246 +*PS1S T:[RegionField]
247 |
248 +*GPOS T:[Region]
249 |
250 +*MRIS T:[RegionField]
251 |
252 +*PCES T:[RegionField]
253 |
254 +*PMES T:[RegionField]
255 |
256 +*PMBS T:[RegionField]
257 |
258 +*SOPM T:[RegionField]
259 |
260 +*GPIO T:[Region]
261 |
262 +*GP56 T:[RegionField]
263 |
264 +*SIO1 T:[Device] HID:[PNP0C02] UID:[46] STA:[0xffffffff]
265 Current state:
266 > IO:[1 0x0 - 0x0 Al:0 Len:0]
267 > IO:[1 0x0 - 0x0 Al:0 Len:0]
268 > ENDTAG
269 Possible State:
270 |
271 +*_HID T:[Integer]
272 |
273 +*_UID T:[Method]
274 |
275 +*CRS_ T:[Buffer]
276 |
277 +*_CRS T:[Method]
278 |
279 +*DCAT T:[Package]
280 |
281 +*MUT0 T:[Mutex]
282 |
283 +*ENFG T:[Method]
284 |
285 +*EXFG T:[Method]
286 |
287 +*LPTM T:[Method]
288 |
289 +*UHID T:[Method]
290 |
291 +*IOID T:[Region]
292 |
293 +*INDX T:[RegionField]
294 |
295 +*DATA T:[RegionField]
296 |
297 +*LDN_ T:[IndexField]
298 |
299 +*OP2C T:[IndexField]
300 |
301 +*OP2D T:[IndexField]
302 |
303 +*ACTR T:[IndexField]
304 |
305 +*IOAH T:[IndexField]
306 |
307 +*IOAL T:[IndexField]
308 |
309 +*IOH2 T:[IndexField]
310 |
311 +*IOL2 T:[IndexField]
312 |
313 +*INTR T:[IndexField]
314 |
315 +*DMCH T:[IndexField]
316 |
317 +*RGE0 T:[IndexField]
318 |
319 +*RGE1 T:[IndexField]
320 |
321 +*RGE2 T:[IndexField]
322 |
323 +*RGE3 T:[IndexField]
324 |
325 +*RGE4 T:[IndexField]
326 |
327 +*RGE5 T:[IndexField]
328 |
329 +*RGE6 T:[IndexField]
330 |
331 +*RGE7 T:[IndexField]
332 |
333 +*OPT0 T:[IndexField]
334 |
335 +*OPT1 T:[IndexField]
336 |
337 +*OPT2 T:[IndexField]
338 |
339 +*OPT3 T:[IndexField]
340 |
341 +*OPT4 T:[IndexField]
342 |
343 +*OPT5 T:[IndexField]
344 |
345 +*OPT6 T:[IndexField]
346 |
347 +*OPT7 T:[IndexField]
348 |
349 +*OPT8 T:[IndexField]
350 |
351 +*OPT9 T:[IndexField]
352 |
353 +*OPTA T:[IndexField]
354 |
355 +*CGLD T:[Method]
356 |
357 +*DSTA T:[Method]
358 |
359 +*DCNT T:[Method]
360 |
361 +*CRS1 T:[Buffer]
362 |
363 +*CRS2 T:[Buffer]
364 |
365 +*DCRS T:[Method]
366 |
367 +*DSRS T:[Method]
368 |
369 +*IRQM T:[BufferField]
370 |
371 +*DMAM T:[BufferField]
372 |
373 +*IO11 T:[BufferField]
374 |
375 +*IO12 T:[BufferField]
376 |
377 +*LEN1 T:[BufferField]
378 |
379 +*IRQE T:[BufferField]
380 |
381 +*DMAE T:[BufferField]
382 |
383 +*IO21 T:[BufferField]
384 |
385 +*IO22 T:[BufferField]
386 |
387 +*LEN2 T:[BufferField]
388 |
389 +*IO31 T:[BufferField]
390 |
391 +*IO32 T:[BufferField]
392 |
393 +*LEN3 T:[BufferField]
394 |
395 +*PMFG T:[Integer]
396 |
397 +*SIOS T:[Method]
398 |
399 +*SIOW T:[Method]
400 |
401 +*SIOH T:[Method]
402 |
403 +*PS2K T:[Device] HID:[PNP0303] CID:[PNP0303] STA:[0xf]
404 Current state:
405 > IO:[1 0x60 - 0x60 Al:0 Len:1]
406 > IO:[1 0x64 - 0x64 Al:0 Len:1]
407 >Trigger by Edge, Polarity High IRQ-1
408 > ENDTAG
409 Possible State:
410 > DPF-S: CP:0x0 PR:0x0
411 >Trigger by Edge, Polarity High IRQ-1
412 > DPF-E: CP:0x0 PR:0x0
413 > ENDTAG
414 |
415 +*_HID T:[Integer]
416 |
417 +*_CID T:[Integer]
418 |
419 +*_STA T:[Method]
420 |
421 +*_CRS T:[Buffer]
422 |
423 +*_PRS T:[Buffer]
424 |
425 +*_PRW T:[Method]
426 |
427 +*_PSW T:[Method]
428 |
429 +*PS2M T:[Device] HID:[PNP0F03] CID:[PNP0F03] STA:[0x0]
430 Current state:
431 >Trigger by Edge, Polarity High IRQ-12
432 > ENDTAG
433 Possible State:
434 > DPF-S: CP:0x0 PR:0x0
435 > DPF-E: CP:0x0 PR:0x0
436 > ENDTAG
437 |
438 +*_HID T:[Integer]
439 |
440 +*_CID T:[Integer]
441 |
442 +*_STA T:[Method]
443 |
444 +*M2R0 T:[Buffer]
445 |
446 +*M2R1 T:[Buffer]
447 |
448 +*_CRS T:[Method]
449 |
450 +*_PRS T:[Buffer]
451 |
452 +*_PRW T:[Method]
453 |
454 +*_PSW T:[Method]
455 |
456 +*KBFG T:[Integer]
457 |
458 +*MSFG T:[Integer]
459 |
460 +*SWFG T:[Integer]
461 |
462 +*IOKP T:[Region]
463 |
464 +*KP60 T:[RegionField]
465 |
466 +*KP64 T:[RegionField]
467 |
468 +*KB64 T:[Region]
469 |
470 +*KRDY T:[RegionField]
471 |
472 +*IOKS T:[Method]
473 |
474 +*IOKW T:[Method]
475 |
476 +*IOKH T:[Method]
477 |
478 +*UAR1 T:[Device] HID:[PNP0501] UID:[1] STA:[0x0]
479 Current state:
480 > IO:[1 0x0 - 0x0 Al:1 Len:0]
481 >Trigger by Edge, Polarity High IRQ-4
482 >
483 > ENDTAG
484 Possible State:
485 > DPF-S: CP:0x0 PR:0x0
486 > IO:[1 0x3f8 - 0x3f8 Al:1 Len:8]
487 >Trigger by Edge, Polarity High IRQ-4
488 >
489 > DPF-S: CP:0x1 PR:0x1
490 > IO:[1 0x3f8 - 0x3f8 Al:1 Len:8]
491 >Trigger by Edge, Polarity High IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
492 >
493 > DPF-S: CP:0x1 PR:0x1
494 > IO:[1 0x2f8 - 0x2f8 Al:1 Len:8]
495 >Trigger by Edge, Polarity High IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
496 >
497 > DPF-S: CP:0x1 PR:0x1
498 > IO:[1 0x3e8 - 0x3e8 Al:1 Len:8]
499 >Trigger by Edge, Polarity High IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
500 >
501 > DPF-S: CP:0x1 PR:0x1
502 > IO:[1 0x2e8 - 0x2e8 Al:1 Len:8]
503 >Trigger by Edge, Polarity High IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
504 >
505 > DPF-E: CP:0x0 PR:0x0
506 > ENDTAG
507 |
508 +*_UID T:[Integer]
509 |
510 +*_HID T:[Method]
511 |
512 +*_STA T:[Method]
513 |
514 +*_DIS T:[Method]
515 |
516 +*_CRS T:[Method]
517 |
518 +*_SRS T:[Method]
519 |
520 +*_PRS T:[Buffer]
521 |
522 +*_PRW T:[Method]
523 |
524 +*LPTE T:[Device] HID:[PNP0401] STA:[0x0]
525 Current state:
526 > IO:[1 0x378 - 0x378 Al:1 Len:8]
527 > IO:[1 0x778 - 0x778 Al:1 Len:8]
528 >Trigger by Edge, Polarity High IRQ-5
529 >
530 > ENDTAG
531 Possible State:
532 > DPF-S: CP:0x0 PR:0x0
533 > IO:[1 0x378 - 0x378 Al:1 Len:8]
534 > IO:[1 0x778 - 0x778 Al:1 Len:8]
535 >Trigger by Edge, Polarity High IRQ-5
536 > DMA-3
537 > DPF-S: CP:0x1 PR:0x1
538 > IO:[1 0x378 - 0x378 Al:1 Len:8]
539 > IO:[1 0x778 - 0x778 Al:1 Len:8]
540 >Trigger by Edge, Polarity High IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
541 > DMA-1 DMA-3
542 > DPF-S: CP:0x1 PR:0x1
543 > IO:[1 0x278 - 0x278 Al:1 Len:8]
544 > IO:[1 0x678 - 0x678 Al:1 Len:8]
545 >Trigger by Edge, Polarity High IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
546 > DMA-1 DMA-3
547 > DPF-S: CP:0x1 PR:0x1
548 > IO:[1 0x3bc - 0x3bc Al:1 Len:4]
549 > IO:[1 0x7bc - 0x7bc Al:1 Len:4]
550 >Trigger by Edge, Polarity High IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12
551 > DMA-1 DMA-3
552 > DPF-S: CP:0x1 PR:0x1
553 > IO:[1 0x378 - 0x378 Al:1 Len:8]
554 > IO:[1 0x778 - 0x778 Al:1 Len:8]
555 >Trigger by Edge, Polarity High
556 > DMA-1 DMA-3
557 > DPF-S: CP:0x1 PR:0x1
558 > IO:[1 0x278 - 0x278 Al:1 Len:8]
559 > IO:[1 0x678 - 0x678 Al:1 Len:8]
560 >Trigger by Edge, Polarity High
561 > DMA-1 DMA-3
562 > DPF-S: CP:0x1 PR:0x1
563 > IO:[1 0x3bc - 0x3bc Al:1 Len:4]
564 > IO:[1 0x7bc - 0x7bc Al:1 Len:4]
565 >Trigger by Edge, Polarity High
566 > DMA-1 DMA-3
567 > DPF-E: CP:0x0 PR:0x0
568 > ENDTAG
569 |
570 +*_HID T:[Method]
571 |
572 +*_STA T:[Method]
573 |
574 +*_DIS T:[Method]
575 |
576 +*_CRS T:[Method]
577 |
578 +*_SRS T:[Method]
579 |
580 +*_PRS T:[Method]
581 |
582 +*LPPR T:[Buffer]
583 |
584 +*EPPR T:[Buffer]
585 |
586 +*PIC_ T:[Device] HID:[PNP0000] STA:[0xffffffff]
587 Current state:
588 > IO:[1 0x20 - 0x20 Al:0 Len:2]
589 > IO:[1 0xa0 - 0xa0 Al:0 Len:2]
590 >Trigger by Edge, Polarity High IRQ-2
591 > ENDTAG
592 Possible State:
593 |
594 +*_HID T:[Integer]
595 |
596 +*_CRS T:[Buffer]
597 |
598 +*DMAD T:[Device] HID:[PNP0200] STA:[0xffffffff]
599 Current state:
600 > DMA-4
601 > IO:[1 0x0 - 0x0 Al:0 Len:16]
602 > IO:[1 0x81 - 0x81 Al:0 Len:3]
603 > IO:[1 0x87 - 0x87 Al:0 Len:1]
604 > IO:[1 0x89 - 0x89 Al:0 Len:3]
605 > IO:[1 0x8f - 0x8f Al:0 Len:1]
606 > IO:[1 0xc0 - 0xc0 Al:0 Len:32]
607 > ENDTAG
608 Possible State:
609 |
610 +*_HID T:[Integer]
611 |
612 +*_CRS T:[Buffer]
613 |
614 +*TMR_ T:[Device] HID:[PNP0100] STA:[0xffffffff]
615 Current state:
616 > IO:[1 0x40 - 0x40 Al:0 Len:4]
617 >Trigger by Edge, Polarity High IRQ-0
618 > ENDTAG
619 Possible State:
620 |
621 +*_HID T:[Integer]
622 |
623 +*_CRS T:[Buffer]
624 |
625 +*RTC0 T:[Device] HID:[PNP0B00] STA:[0xffffffff]
626 Current state:
627 > IO:[1 0x70 - 0x70 Al:0 Len:2]
628 >Trigger by Edge, Polarity High IRQ-8
629 > ENDTAG
630 Possible State:
631 |
632 +*_HID T:[Integer]
633 |
634 +*_CRS T:[Buffer]
635 |
636 +*SPKR T:[Device] HID:[PNP0800] STA:[0xffffffff]
637 Current state:
638 > IO:[1 0x61 - 0x61 Al:0 Len:1]
639 > ENDTAG
640 Possible State:
641 |
642 +*_HID T:[Integer]
643 |
644 +*_CRS T:[Buffer]
645 |
646 +*RMSC T:[Device] HID:[PNP0C02] UID:[16] STA:[0xffffffff]
647 Current state:
648 > IO:[1 0x10 - 0x10 Al:0 Len:16]
649 > IO:[1 0x22 - 0x22 Al:0 Len:30]
650 > IO:[1 0x44 - 0x44 Al:0 Len:28]
651 > IO:[1 0x62 - 0x62 Al:0 Len:2]
652 > IO:[1 0x65 - 0x65 Al:0 Len:11]
653 > IO:[1 0x72 - 0x72 Al:0 Len:14]
654 > IO:[1 0x80 - 0x80 Al:0 Len:1]
655 > IO:[1 0x84 - 0x84 Al:0 Len:3]
656 > IO:[1 0x88 - 0x88 Al:0 Len:1]
657 > IO:[1 0x8c - 0x8c Al:0 Len:3]
658 > IO:[1 0x90 - 0x90 Al:0 Len:16]
659 > IO:[1 0xa2 - 0xa2 Al:0 Len:30]
660 > IO:[1 0xe0 - 0xe0 Al:0 Len:16]
661 > IO:[1 0x4d0 - 0x4d0 Al:0 Len:2]
662 > FIXED-MEM32:[0 0xffe00000 Len:2097152]
663 > FIXED-MEM32:[0 0xfed30000 Len:65536]
664 > FIXED-MEM32:[0 0xfed08000 Len:4096]
665 > IO:[1 0x540 - 0x540 Al:0 Len:64]
666 > ENDTAG
667 Possible State:
668 |
669 +*_HID T:[Integer]
670 |
671 +*_UID T:[Integer]
672 |
673 +*CRS_ T:[Buffer]
674 |
675 +*_CRS T:[Method]
676 |
677 +*COPR T:[Device] HID:[PNP0C04] STA:[0xffffffff]
678 Current state:
679 > IO:[1 0xf0 - 0xf0 Al:0 Len:16]
680 >Trigger by Edge, Polarity High IRQ-13
681 > ENDTAG
682 Possible State:
683 |
684 +*_HID T:[Integer]
685 |
686 +*_CRS T:[Buffer]
687 |
688 +*CF40 T:[Region]
689 |
690 +*CHE0 T:[RegionField]
691 |
692 +*MULT T:[RegionField]
693 |
694 +*CAB0 T:[RegionField]
695 |
696 +*CHE1 T:[RegionField]
697 |
698 +*AHEN T:[RegionField]
699 |
700 +*PRT0 T:[RegionField]
701 |
702 +*AHM0 T:[RegionField]
703 |
704 +*PRT1 T:[RegionField]
705 |
706 +*AHM1 T:[RegionField]
707 |
708 +*CF42 T:[RegionField]
709 |
710 +*SWAP T:[RegionField]
711 |
712 +*PATA T:[RegionField]
713 |
714 +*WTEN T:[RegionField]
715 |
716 +*PIOT T:[Package]
717 |
718 +*UDMA T:[Package]
719 |
720 +*MDMA T:[Package]
721 |
722 +*IDEB T:[Buffer]
723 |
724 +*PIO0 T:[Integer]
725 |
726 +*DMA0 T:[Integer]
727 |
728 +*MDA0 T:[Integer]
729 |
730 +*PIO1 T:[Integer]
731 |
732 +*DMA1 T:[Integer]
733 |
734 +*MDA1 T:[Integer]
735 |
736 +*PIO2 T:[Integer]
737 |
738 +*DMA2 T:[Integer]
739 |
740 +*MDA2 T:[Integer]
741 |
742 +*PIO3 T:[Integer]
743 |
744 +*DMA3 T:[Integer]
745 |
746 +*MDA3 T:[Integer]
747 |
748 +*FLGP T:[Integer]
749 |
750 +*FLGS T:[Integer]
751 |
752 +*IDE0 T:[Device] ADR:[0x0] STA:[0xffffffff]
753 Current state:
754 Possible State:
755 |
756 +*_ADR T:[Integer]
757 |
758 +*_GTM T:[Method]
759 |
760 +*_STM T:[Method]
761 |
762 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
763 Current state:
764 Possible State:
765 |
766 +*_ADR T:[Integer]
767 |
768 +*_GTF T:[Method]
769 |
770 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
771 Current state:
772 Possible State:
773 |
774 +*_ADR T:[Integer]
775 |
776 +*_GTF T:[Method]
777 |
778 +*IDE1 T:[Device] ADR:[0x1] STA:[0xffffffff]
779 Current state:
780 Possible State:
781 |
782 +*_ADR T:[Integer]
783 |
784 +*_GTM T:[Method]
785 |
786 +*_STM T:[Method]
787 |
788 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
789 Current state:
790 Possible State:
791 |
792 +*_ADR T:[Integer]
793 |
794 +*_GTF T:[Method]
795 |
796 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
797 Current state:
798 Possible State:
799 |
800 +*_ADR T:[Integer]
801 |
802 +*_GTF T:[Method]
803 |
804 +*PIX0 T:[Region]
805 |
806 +*GTM0 T:[BufferField]
807 |
808 +*GTM1 T:[BufferField]
809 |
810 +*GTM2 T:[BufferField]
811 |
812 +*GTM3 T:[BufferField]
813 |
814 +*GTM4 T:[BufferField]
815 |
816 +*ICH9 T:[Device] HID:[PNP0C01] UID:[455] STA:[0xf]
817 Current state:
818 > IO:[1 0x400 - 0x400 Al:0 Len:128]
819 > IO:[1 0x1180 - 0x1180 Al:0 Len:32]
820 > IO:[1 0x500 - 0x500 Al:0 Len:128]
821 > FIXED-MEM32:[1 0xfed1c000 Len:16384]
822 > FIXED-MEM32:[1 0xfec00000 Len:1048576]
823 > FIXED-MEM32:[1 0xfee00000 Len:65536]
824 > FIXED-MEM32:[0 0xff000000 Len:16777216]
825 > ENDTAG
826 Possible State:
827 |
828 +*_HID T:[Integer]
829 |
830 +*_UID T:[Integer]
831 |
832 +*_STA T:[Integer]
833 |
834 +*ICHR T:[Buffer]
835 |
836 +*_CRS T:[Method]
837 |
838 +*SAT0 T:[Device] ADR:[0x1f0002] STA:[0xffffffff]
839 Current state:
840 Possible State:
841 |
842 +*_ADR T:[Integer]
843 |
844 +*SAT1 T:[Device] ADR:[0x1f0005] STA:[0xffffffff]
845 Current state:
846 Possible State:
847 |
848 +*_ADR T:[Integer]
849 |
850 +*SMB_ T:[Device] ADR:[0x1f0003] STA:[0xffffffff]
851 Current state:
852 Possible State:
853 |
854 +*_ADR T:[Integer]
855 |
856 +*SMIO T:[Region]
857 |
858 +*HSTS T:[RegionField]
859 |
860 +*HCNT T:[RegionField]
861 |
862 +*HCMD T:[RegionField]
863 |
864 +*TSAD T:[RegionField]
865 |
866 +*HDT0 T:[RegionField]
867 |
868 +*HDT1 T:[RegionField]
869 |
870 +*HBDT T:[RegionField]
871 |
872 +*RSAD T:[RegionField]
873 |
874 +*RSDA T:[RegionField]
875 |
876 +*AUST T:[RegionField]
877 |
878 +*AUCT T:[RegionField]
879 |
880 +*SMLP T:[RegionField]
881 |
882 +*SMBP T:[RegionField]
883 |
884 +*SSTS T:[RegionField]
885 |
886 +*SCMD T:[RegionField]
887 |
888 +*NDAD T:[RegionField]
889 |
890 +*NDLB T:[RegionField]
891 |
892 +*NDHB T:[RegionField]
893 |
894 +*SMCS T:[Method]
895 |
896 +*USB0 T:[Device] ADR:[0x1d0000] STA:[0xffffffff] SxD State:[0x02:02:02:02]
897 Current state:
898 Possible State:
899 |
900 +*_ADR T:[Integer]
901 |
902 +*BAR0 T:[Region]
903 |
904 +*USBW T:[RegionField]
905 |
906 +*_S4D T:[Integer]
907 |
908 +*_S3D T:[Integer]
909 |
910 +*_S2D T:[Integer]
911 |
912 +*_S1D T:[Integer]
913 |
914 +*_PSW T:[Method]
915 |
916 +*_PRW T:[Method]
917 |
918 +*USB1 T:[Device] ADR:[0x1d0001] STA:[0xffffffff] SxD State:[0x02:02:02:02]
919 Current state:
920 Possible State:
921 |
922 +*_ADR T:[Integer]
923 |
924 +*BAR0 T:[Region]
925 |
926 +*USBW T:[RegionField]
927 |
928 +*_S4D T:[Integer]
929 |
930 +*_S3D T:[Integer]
931 |
932 +*_S2D T:[Integer]
933 |
934 +*_S1D T:[Integer]
935 |
936 +*_PSW T:[Method]
937 |
938 +*_PRW T:[Method]
939 |
940 +*USB2 T:[Device] ADR:[0x1d0002] STA:[0xffffffff] SxD State:[0x02:02:02:02]
941 Current state:
942 Possible State:
943 |
944 +*_ADR T:[Integer]
945 |
946 +*BAR0 T:[Region]
947 |
948 +*USBW T:[RegionField]
949 |
950 +*_S4D T:[Integer]
951 |
952 +*_S3D T:[Integer]
953 |
954 +*_S2D T:[Integer]
955 |
956 +*_S1D T:[Integer]
957 |
958 +*_PSW T:[Method]
959 |
960 +*_PRW T:[Method]
961 |
962 +*USB5 T:[Device] ADR:[0x1a0002] STA:[0xffffffff] SxD State:[0x02:02:02:02]
963 Current state:
964 Possible State:
965 |
966 +*_ADR T:[Integer]
967 |
968 +*BAR0 T:[Region]
969 |
970 +*USBW T:[RegionField]
971 |
972 +*_S4D T:[Integer]
973 |
974 +*_S3D T:[Integer]
975 |
976 +*_S2D T:[Integer]
977 |
978 +*_S1D T:[Integer]
979 |
980 +*_PSW T:[Method]
981 |
982 +*_PRW T:[Method]
983 |
984 +*USB3 T:[Device] ADR:[0x1a0000] STA:[0xffffffff] SxD State:[0x02:02:02:02]
985 Current state:
986 Possible State:
987 |
988 +*_ADR T:[Integer]
989 |
990 +*BAR0 T:[Region]
991 |
992 +*USBW T:[RegionField]
993 |
994 +*_S4D T:[Integer]
995 |
996 +*_S3D T:[Integer]
997 |
998 +*_S2D T:[Integer]
999 |
1000 +*_S1D T:[Integer]
1001 |
1002 +*_PSW T:[Method]
1003 |
1004 +*_PRW T:[Method]
1005 |
1006 +*USB4 T:[Device] ADR:[0x1a0001] STA:[0xffffffff] SxD State:[0x02:02:02:02]
1007 Current state:
1008 Possible State:
1009 |
1010 +*_ADR T:[Integer]
1011 |
1012 +*BAR0 T:[Region]
1013 |
1014 +*USBW T:[RegionField]
1015 |
1016 +*_S4D T:[Integer]
1017 |
1018 +*_S3D T:[Integer]
1019 |
1020 +*_S2D T:[Integer]
1021 |
1022 +*_S1D T:[Integer]
1023 |
1024 +*_PSW T:[Method]
1025 |
1026 +*_PRW T:[Method]
1027 |
1028 +*PEX0 T:[Device] ADR:[0x1c0000] STA:[0xffffffff]
1029 Current state:
1030 Possible State:
1031 |
1032 +*_ADR T:[Integer]
1033 |
1034 +*PXRC T:[Region]
1035 |
1036 +*PMS_ T:[RegionField]
1037 |
1038 +*PMP_ T:[RegionField]
1039 |
1040 +*HPE_ T:[RegionField]
1041 |
1042 +*PCE_ T:[RegionField]
1043 |
1044 +*HPS_ T:[RegionField]
1045 |
1046 +*PCS_ T:[RegionField]
1047 |
1048 +*CSS_ T:[Method]
1049 |
1050 +*SPRT T:[Method]
1051 |
1052 +*WPRT T:[Method]
1053 |
1054 +*_PRW T:[Method]
1055 |
1056 +*_PRT T:[Method]
1057 |
1058 +*PEX1 T:[Device] ADR:[0x1c0001] STA:[0xffffffff]
1059 Current state:
1060 Possible State:
1061 |
1062 +*_ADR T:[Integer]
1063 |
1064 +*PXRC T:[Region]
1065 |
1066 +*PMS_ T:[RegionField]
1067 |
1068 +*PMP_ T:[RegionField]
1069 |
1070 +*HPE_ T:[RegionField]
1071 |
1072 +*PCE_ T:[RegionField]
1073 |
1074 +*HPS_ T:[RegionField]
1075 |
1076 +*PCS_ T:[RegionField]
1077 |
1078 +*CSS_ T:[Method]
1079 |
1080 +*SPRT T:[Method]
1081 |
1082 +*WPRT T:[Method]
1083 |
1084 +*_PRW T:[Method]
1085 |
1086 +*_PRT T:[Method]
1087 |
1088 +*PEX2 T:[Device] ADR:[0x1c0002] STA:[0xffffffff]
1089 Current state:
1090 Possible State:
1091 |
1092 +*_ADR T:[Integer]
1093 |
1094 +*PXRC T:[Region]
1095 |
1096 +*PMS_ T:[RegionField]
1097 |
1098 +*PMP_ T:[RegionField]
1099 |
1100 +*HPE_ T:[RegionField]
1101 |
1102 +*PCE_ T:[RegionField]
1103 |
1104 +*HPS_ T:[RegionField]
1105 |
1106 +*PCS_ T:[RegionField]
1107 |
1108 +*CSS_ T:[Method]
1109 |
1110 +*SPRT T:[Method]
1111 |
1112 +*WPRT T:[Method]
1113 |
1114 +*_PRW T:[Method]
1115 |
1116 +*_PRT T:[Method]
1117 |
1118 +*J368 T:[Device] ADR:[0x0] STA:[0xffffffff]
1119 Current state:
1120 Possible State:
1121 |
1122 +*_ADR T:[Integer]
1123 |
1124 +*CF40 T:[Region]
1125 |
1126 +*CHE0 T:[RegionField]
1127 |
1128 +*MULT T:[RegionField]
1129 |
1130 +*CAB0 T:[RegionField]
1131 |
1132 +*CHE1 T:[RegionField]
1133 |
1134 +*AHEN T:[RegionField]
1135 |
1136 +*PRT0 T:[RegionField]
1137 |
1138 +*AHM0 T:[RegionField]
1139 |
1140 +*PRT1 T:[RegionField]
1141 |
1142 +*AHM1 T:[RegionField]
1143 |
1144 +*CF42 T:[RegionField]
1145 |
1146 +*SWAP T:[RegionField]
1147 |
1148 +*PATA T:[RegionField]
1149 |
1150 +*WTEN T:[RegionField]
1151 |
1152 +*PIOT T:[Package]
1153 |
1154 +*UDMA T:[Package]
1155 |
1156 +*MDMA T:[Package]
1157 |
1158 +*IDEB T:[Buffer]
1159 |
1160 +*PIO0 T:[Integer]
1161 |
1162 +*DMA0 T:[Integer]
1163 |
1164 +*MDA0 T:[Integer]
1165 |
1166 +*PIO1 T:[Integer]
1167 |
1168 +*DMA1 T:[Integer]
1169 |
1170 +*MDA1 T:[Integer]
1171 |
1172 +*PIO2 T:[Integer]
1173 |
1174 +*DMA2 T:[Integer]
1175 |
1176 +*MDA2 T:[Integer]
1177 |
1178 +*PIO3 T:[Integer]
1179 |
1180 +*DMA3 T:[Integer]
1181 |
1182 +*MDA3 T:[Integer]
1183 |
1184 +*FLGP T:[Integer]
1185 |
1186 +*FLGS T:[Integer]
1187 |
1188 +*IDE0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1189 Current state:
1190 Possible State:
1191 |
1192 +*_ADR T:[Integer]
1193 |
1194 +*_GTM T:[Method]
1195 |
1196 +*_STM T:[Method]
1197 |
1198 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1199 Current state:
1200 Possible State:
1201 |
1202 +*_ADR T:[Integer]
1203 |
1204 +*_GTF T:[Method]
1205 |
1206 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1207 Current state:
1208 Possible State:
1209 |
1210 +*_ADR T:[Integer]
1211 |
1212 +*_GTF T:[Method]
1213 |
1214 +*IDE1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1215 Current state:
1216 Possible State:
1217 |
1218 +*_ADR T:[Integer]
1219 |
1220 +*_GTM T:[Method]
1221 |
1222 +*_STM T:[Method]
1223 |
1224 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1225 Current state:
1226 Possible State:
1227 |
1228 +*_ADR T:[Integer]
1229 |
1230 +*_GTF T:[Method]
1231 |
1232 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1233 Current state:
1234 Possible State:
1235 |
1236 +*_ADR T:[Integer]
1237 |
1238 +*_GTF T:[Method]
1239 |
1240 +*GTM0 T:[BufferField]
1241 |
1242 +*GTM1 T:[BufferField]
1243 |
1244 +*GTM2 T:[BufferField]
1245 |
1246 +*GTM3 T:[BufferField]
1247 |
1248 +*GTM4 T:[BufferField]
1249 |
1250 +*PEX3 T:[Device] ADR:[0x1c0003] STA:[0xffffffff]
1251 Current state:
1252 Possible State:
1253 |
1254 +*_ADR T:[Integer]
1255 |
1256 +*PXRC T:[Region]
1257 |
1258 +*PMS_ T:[RegionField]
1259 |
1260 +*PMP_ T:[RegionField]
1261 |
1262 +*HPE_ T:[RegionField]
1263 |
1264 +*PCE_ T:[RegionField]
1265 |
1266 +*HPS_ T:[RegionField]
1267 |
1268 +*PCS_ T:[RegionField]
1269 |
1270 +*CSS_ T:[Method]
1271 |
1272 +*SPRT T:[Method]
1273 |
1274 +*WPRT T:[Method]
1275 |
1276 +*_PRW T:[Method]
1277 |
1278 +*_PRT T:[Method]
1279 |
1280 +*PEX4 T:[Device] ADR:[0x1c0004] STA:[0xffffffff]
1281 Current state:
1282 Possible State:
1283 |
1284 +*_ADR T:[Integer]
1285 |
1286 +*PXRC T:[Region]
1287 |
1288 +*PMS_ T:[RegionField]
1289 |
1290 +*PMP_ T:[RegionField]
1291 |
1292 +*HPE_ T:[RegionField]
1293 |
1294 +*PCE_ T:[RegionField]
1295 |
1296 +*HPS_ T:[RegionField]
1297 |
1298 +*PCS_ T:[RegionField]
1299 |
1300 +*CSS_ T:[Method]
1301 |
1302 +*SPRT T:[Method]
1303 |
1304 +*WPRT T:[Method]
1305 |
1306 +*_PRW T:[Method]
1307 |
1308 +*_PRT T:[Method]
1309 |
1310 +*JMB0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1311 Current state:
1312 Possible State:
1313 |
1314 +*_ADR T:[Integer]
1315 |
1316 +*CF40 T:[Region]
1317 |
1318 +*CHE0 T:[RegionField]
1319 |
1320 +*MULT T:[RegionField]
1321 |
1322 +*CAB0 T:[RegionField]
1323 |
1324 +*CHE1 T:[RegionField]
1325 |
1326 +*AHEN T:[RegionField]
1327 |
1328 +*PRT0 T:[RegionField]
1329 |
1330 +*AHM0 T:[RegionField]
1331 |
1332 +*PRT1 T:[RegionField]
1333 |
1334 +*AHM1 T:[RegionField]
1335 |
1336 +*CF42 T:[RegionField]
1337 |
1338 +*SWAP T:[RegionField]
1339 |
1340 +*PATA T:[RegionField]
1341 |
1342 +*WTEN T:[RegionField]
1343 |
1344 +*PIOT T:[Package]
1345 |
1346 +*UDMA T:[Package]
1347 |
1348 +*MDMA T:[Package]
1349 |
1350 +*IDEB T:[Buffer]
1351 |
1352 +*PIO0 T:[Integer]
1353 |
1354 +*DMA0 T:[Integer]
1355 |
1356 +*MDA0 T:[Integer]
1357 |
1358 +*PIO1 T:[Integer]
1359 |
1360 +*DMA1 T:[Integer]
1361 |
1362 +*MDA1 T:[Integer]
1363 |
1364 +*PIO2 T:[Integer]
1365 |
1366 +*DMA2 T:[Integer]
1367 |
1368 +*MDA2 T:[Integer]
1369 |
1370 +*PIO3 T:[Integer]
1371 |
1372 +*DMA3 T:[Integer]
1373 |
1374 +*MDA3 T:[Integer]
1375 |
1376 +*FLGP T:[Integer]
1377 |
1378 +*FLGS T:[Integer]
1379 |
1380 +*IDE0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1381 Current state:
1382 Possible State:
1383 |
1384 +*_ADR T:[Integer]
1385 |
1386 +*_GTM T:[Method]
1387 |
1388 +*_STM T:[Method]
1389 |
1390 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1391 Current state:
1392 Possible State:
1393 |
1394 +*_ADR T:[Integer]
1395 |
1396 +*_GTF T:[Method]
1397 |
1398 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1399 Current state:
1400 Possible State:
1401 |
1402 +*_ADR T:[Integer]
1403 |
1404 +*_GTF T:[Method]
1405 |
1406 +*IDE1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1407 Current state:
1408 Possible State:
1409 |
1410 +*_ADR T:[Integer]
1411 |
1412 +*_GTM T:[Method]
1413 |
1414 +*_STM T:[Method]
1415 |
1416 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1417 Current state:
1418 Possible State:
1419 |
1420 +*_ADR T:[Integer]
1421 |
1422 +*_GTF T:[Method]
1423 |
1424 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1425 Current state:
1426 Possible State:
1427 |
1428 +*_ADR T:[Integer]
1429 |
1430 +*_GTF T:[Method]
1431 |
1432 +*GTM0 T:[BufferField]
1433 |
1434 +*GTM1 T:[BufferField]
1435 |
1436 +*GTM2 T:[BufferField]
1437 |
1438 +*GTM3 T:[BufferField]
1439 |
1440 +*GTM4 T:[BufferField]
1441 |
1442 +*JMB1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1443 Current state:
1444 Possible State:
1445 |
1446 +*_ADR T:[Integer]
1447 |
1448 +*CF40 T:[Region]
1449 |
1450 +*CHE0 T:[RegionField]
1451 |
1452 +*MULT T:[RegionField]
1453 |
1454 +*CAB0 T:[RegionField]
1455 |
1456 +*CHE1 T:[RegionField]
1457 |
1458 +*AHEN T:[RegionField]
1459 |
1460 +*PRT0 T:[RegionField]
1461 |
1462 +*AHM0 T:[RegionField]
1463 |
1464 +*PRT1 T:[RegionField]
1465 |
1466 +*AHM1 T:[RegionField]
1467 |
1468 +*CF42 T:[RegionField]
1469 |
1470 +*SWAP T:[RegionField]
1471 |
1472 +*PATA T:[RegionField]
1473 |
1474 +*WTEN T:[RegionField]
1475 |
1476 +*PIOT T:[Package]
1477 |
1478 +*UDMA T:[Package]
1479 |
1480 +*MDMA T:[Package]
1481 |
1482 +*IDEB T:[Buffer]
1483 |
1484 +*PIO0 T:[Integer]
1485 |
1486 +*DMA0 T:[Integer]
1487 |
1488 +*MDA0 T:[Integer]
1489 |
1490 +*PIO1 T:[Integer]
1491 |
1492 +*DMA1 T:[Integer]
1493 |
1494 +*MDA1 T:[Integer]
1495 |
1496 +*PIO2 T:[Integer]
1497 |
1498 +*DMA2 T:[Integer]
1499 |
1500 +*MDA2 T:[Integer]
1501 |
1502 +*PIO3 T:[Integer]
1503 |
1504 +*DMA3 T:[Integer]
1505 |
1506 +*MDA3 T:[Integer]
1507 |
1508 +*FLGP T:[Integer]
1509 |
1510 +*FLGS T:[Integer]
1511 |
1512 +*IDE0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1513 Current state:
1514 Possible State:
1515 |
1516 +*_ADR T:[Integer]
1517 |
1518 +*_GTM T:[Method]
1519 |
1520 +*_STM T:[Method]
1521 |
1522 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1523 Current state:
1524 Possible State:
1525 |
1526 +*_ADR T:[Integer]
1527 |
1528 +*_GTF T:[Method]
1529 |
1530 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1531 Current state:
1532 Possible State:
1533 |
1534 +*_ADR T:[Integer]
1535 |
1536 +*_GTF T:[Method]
1537 |
1538 +*IDE1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1539 Current state:
1540 Possible State:
1541 |
1542 +*_ADR T:[Integer]
1543 |
1544 +*_GTM T:[Method]
1545 |
1546 +*_STM T:[Method]
1547 |
1548 +*DRV0 T:[Device] ADR:[0x0] STA:[0xffffffff]
1549 Current state:
1550 Possible State:
1551 |
1552 +*_ADR T:[Integer]
1553 |
1554 +*_GTF T:[Method]
1555 |
1556 +*DRV1 T:[Device] ADR:[0x1] STA:[0xffffffff]
1557 Current state:
1558 Possible State:
1559 |
1560 +*_ADR T:[Integer]
1561 |
1562 +*_GTF T:[Method]
1563 |
1564 +*GTM0 T:[BufferField]
1565 |
1566 +*GTM1 T:[BufferField]
1567 |
1568 +*GTM2 T:[BufferField]
1569 |
1570 +*GTM3 T:[BufferField]
1571 |
1572 +*GTM4 T:[BufferField]
1573 |
1574 +*GBE_ T:[Device] ADR:[0x190000] STA:[0xffffffff]
1575 Current state:
1576 Possible State:
1577 |
1578 +*_ADR T:[Integer]
1579 |
1580 +*BPME T:[Region]
1581 |
1582 +*GPMS T:[RegionField]
1583 |
1584 +*_PRW T:[Method]
1585 |
1586 +*P0P2 T:[Device] ADR:[0x1e0000] STA:[0xffffffff]
1587 Current state:
1588 Possible State:
1589 |
1590 +*_ADR T:[Integer]
1591 |
1592 +*_PRW T:[Method]
1593 |
1594 +*_PRT T:[Method]
1595 |
1596 +*PCI2 T:[Device] ADR:[0x4ffff] STA:[0xffffffff]
1597 Current state:
1598 Possible State:
1599 |
1600 +*_ADR T:[Integer]
1601 |
1602 +*_PRW T:[Method]
1603 |
1604 +*EUSB T:[Device] ADR:[0x1d0007] STA:[0xffffffff] SxD State:[0x02:02:02:02]
1605 Current state:
1606 Possible State:
1607 |
1608 +*_ADR T:[Integer]
1609 |
1610 +*_S4D T:[Integer]
1611 |
1612 +*_S3D T:[Integer]
1613 |
1614 +*_S2D T:[Integer]
1615 |
1616 +*_S1D T:[Integer]
1617 |
1618 +*_PRW T:[Method]
1619 |
1620 +*USBE T:[Device] ADR:[0x1a0007] STA:[0xffffffff] SxD State:[0x02:02:02:02]
1621 Current state:
1622 Possible State:
1623 |
1624 +*_ADR T:[Integer]
1625 |
1626 +*_S4D T:[Integer]
1627 |
1628 +*_S3D T:[Integer]
1629 |
1630 +*_S2D T:[Integer]
1631 |
1632 +*_S1D T:[Integer]
1633 |
1634 +*_PRW T:[Method]
1635 |
1636 +*HPET T:[Device] HID:[PNP0103] STA:[0x0]
1637 Current state:
1638 > FIXED-MEM32:[1 0xfed00000 Len:1024]
1639 > ENDTAG
1640 Possible State:
1641 |
1642 +*_HID T:[Integer]
1643 |
1644 +*CRS_ T:[Buffer]
1645 |
1646 +*HCNT T:[Region]
1647 |
1648 +*HPTS T:[RegionField]
1649 |
1650 +*HPTE T:[RegionField]
1651 |
1652 +*_STA T:[Method]
1653 |
1654 +*_CRS T:[Method]
1655 |
1656 +*_INI T:[Method]
1657 |
1658 +*CRS_ T:[Buffer]
1659 |
1660 +*_CRS T:[Method]
1661 |
1662 +*_OSC T:[Method]
1663 |
1664 +*GFX0 T:[Device] ADR:[0x20000] STA:[0xffffffff]
1665 Current state:
1666 Possible State:
1667 |
1668 +*_ADR T:[Integer]
1669 |
1670 +*OPBS T:[Integer]
1671 |
1672 +*OPBA T:[Method]
1673 |
1674 +*_ROM T:[Method]
1675 |
1676 +*IGDP T:[Region]
1677 |
1678 +*GIVD T:[RegionField]
1679 |
1680 +*GUMA T:[RegionField]
1681 |
1682 +*GMFN T:[RegionField]
1683 |
1684 +*CDCT T:[RegionField]
1685 |
1686 +*GSSE T:[RegionField]
1687 |
1688 +*GSSB T:[RegionField]
1689 |
1690 +*GSES T:[RegionField]
1691 |
1692 +*ASLS T:[RegionField]
1693 |
1694 +*M512 T:[Integer]
1695 |
1696 +*M1GB T:[Integer]
1697 |
1698 +*IGDM T:[Region]
1699 |
1700 +*SIGN T:[RegionField]
1701 |
1702 +*SIZE T:[RegionField]
1703 |
1704 +*OVER T:[RegionField]
1705 |
1706 +*SVER T:[RegionField]
1707 |
1708 +*VVER T:[RegionField]
1709 |
1710 +*GVER T:[RegionField]
1711 |
1712 +*MBOX T:[RegionField]
1713 |
1714 +*KSV0 T:[RegionField]
1715 |
1716 +*KSV1 T:[RegionField]
1717 |
1718 +*IBTT T:[RegionField]
1719 |
1720 +*IPSC T:[RegionField]
1721 |
1722 +*IPAT T:[RegionField]
1723 |
1724 +*IBIA T:[RegionField]
1725 |
1726 +*IBLC T:[RegionField]
1727 |
1728 +*ITVF T:[RegionField]
1729 |
1730 +*ITVM T:[RegionField]
1731 |
1732 +*IDVM T:[RegionField]
1733 |
1734 +*IDVS T:[RegionField]
1735 |
1736 +*ISSC T:[RegionField]
1737 |
1738 +*DRDY T:[RegionField]
1739 |
1740 +*CSTS T:[RegionField]
1741 |
1742 +*CEVT T:[RegionField]
1743 |
1744 +*DIDL T:[RegionField]
1745 |
1746 +*DDL2 T:[RegionField]
1747 |
1748 +*DDL3 T:[RegionField]
1749 |
1750 +*DDL4 T:[RegionField]
1751 |
1752 +*DDL5 T:[RegionField]
1753 |
1754 +*DDL6 T:[RegionField]
1755 |
1756 +*DDL7 T:[RegionField]
1757 |
1758 +*DDL8 T:[RegionField]
1759 |
1760 +*CPDL T:[RegionField]
1761 |
1762 +*CPL2 T:[RegionField]
1763 |
1764 +*CPL3 T:[RegionField]
1765 |
1766 +*CPL4 T:[RegionField]
1767 |
1768 +*CPL5 T:[RegionField]
1769 |
1770 +*CPL6 T:[RegionField]
1771 |
1772 +*CPL7 T:[RegionField]
1773 |
1774 +*CPL8 T:[RegionField]
1775 |
1776 +*CADL T:[RegionField]
1777 |
1778 +*CAL2 T:[RegionField]
1779 |
1780 +*CAL3 T:[RegionField]
1781 |
1782 +*CAL4 T:[RegionField]
1783 |
1784 +*CAL5 T:[RegionField]
1785 |
1786 +*CAL6 T:[RegionField]
1787 |
1788 +*CAL7 T:[RegionField]
1789 |
1790 +*CAL8 T:[RegionField]
1791 |
1792 +*NADL T:[RegionField]
1793 |
1794 +*NDL2 T:[RegionField]
1795 |
1796 +*NDL3 T:[RegionField]
1797 |
1798 +*NDL4 T:[RegionField]
1799 |
1800 +*NDL5 T:[RegionField]
1801 |
1802 +*NDL6 T:[RegionField]
1803 |
1804 +*NDL7 T:[RegionField]
1805 |
1806 +*NDL8 T:[RegionField]
1807 |
1808 +*ASLP T:[RegionField]
1809 |
1810 +*TIDX T:[RegionField]
1811 |
1812 +*CHPD T:[RegionField]
1813 |
1814 +*CLID T:[RegionField]
1815 |
1816 +*CDCK T:[RegionField]
1817 |
1818 +*SXSW T:[RegionField]
1819 |
1820 +*EVTS T:[RegionField]
1821 |
1822 +*CNOT T:[RegionField]
1823 |
1824 +*NRDY T:[RegionField]
1825 |
1826 +*SCIE T:[RegionField]
1827 |
1828 +*GEFC T:[RegionField]
1829 |
1830 +*GXFC T:[RegionField]
1831 |
1832 +*GESF T:[RegionField]
1833 |
1834 +*PARM T:[RegionField]
1835 |
1836 +*DSLP T:[RegionField]
1837 |
1838 +*ARDY T:[RegionField]
1839 |
1840 +*ASLC T:[RegionField]
1841 |
1842 +*TCHE T:[RegionField]
1843 |
1844 +*ALSI T:[RegionField]
1845 |
1846 +*BCLP T:[RegionField]
1847 |
1848 +*PFIT T:[RegionField]
1849 |
1850 +*CBLV T:[RegionField]
1851 |
1852 +*BCLM T:[RegionField]
1853 |
1854 +*CPFM T:[RegionField]
1855 |
1856 +*EPFM T:[RegionField]
1857 |
1858 +*GVD1 T:[RegionField]
1859 |
1860 +*TCOI T:[Region]
1861 |
1862 +*SCIS T:[RegionField]
1863 |
1864 +*DBTB T:[Package]
1865 |
1866 +*GSCI T:[Method]
1867 |
1868 +*GBDA T:[Method]
1869 |
1870 +*SBCB T:[Method]
1871 |
1872 +*OPTS T:[Method]
1873 |
1874 +*OWAK T:[Method]
1875 |
1876 +*MCHP T:[Region]
1877 |
1878 +*TASM T:[RegionField]
1879 |
1880 +*MIN5 T:[BufferField]
1881 |
1882 +*MAX5 T:[BufferField]
1883 |
1884 +*LEN5 T:[BufferField]
1885 |
1886 +*MIN6 T:[BufferField]
1887 |
1888 +*MAX6 T:[BufferField]
1889 |
1890 +*LEN6 T:[BufferField]
1891 |
1892 +*BN00 T:[Method]
1893 |
1894 +*SLPS T:[Integer]
1895 |
1896 +*PMS0 T:[Region]
1897 |
1898 +*RTCS T:[RegionField]
1899 |
1900 +*PEXS T:[RegionField]
1901 |
1902 +*WAKS T:[RegionField]
1903 |
1904 +*PWBT T:[RegionField]
1905 |
1906 +*GPES T:[Region]
1907 |
1908 +*THMS T:[RegionField]
1909 |
1910 +*HPLG T:[RegionField]
1911 |
1912 +*SWGP T:[RegionField]
1913 |
1914 +*UB1S T:[RegionField]
1915 |
1916 +*UB2S T:[RegionField]
1917 |
1918 +*UB5S T:[RegionField]
1919 |
1920 +*TCSS T:[RegionField]
1921 |
1922 +*SBWS T:[RegionField]
1923 |
1924 +*RISS T:[RegionField]
1925 |
1926 +*PESS T:[RegionField]
1927 |
1928 +*PMSS T:[RegionField]
1929 |
1930 +*UB3S T:[RegionField]
1931 |
1932 +*PBSS T:[RegionField]
1933 |
1934 +*UB4S T:[RegionField]
1935 |
1936 +*GPIS T:[RegionField]
1937 |
1938 +*UB6S T:[RegionField]
1939 |
1940 +*SLPB T:[Device] HID:[PNP0C0E] STA:[0xf]
1941 Current state:
1942 Possible State:
1943 |
1944 +*_HID T:[Integer]
1945 |
1946 +*_STA T:[Method]
1947 |
1948 +*_PRW T:[Method]
1949 |
1950 +*PWRB T:[Device] HID:[PNP0C0C] UID:[170] STA:[0xb]
1951 Current state:
1952 Possible State:
1953 |
1954 +*_HID T:[Integer]
1955 |
1956 +*_UID T:[Integer]
1957 |
1958 +*_STA T:[Integer]
1959 |
1960 +*BUFA T:[Buffer]
1961 |
1962 +*LNKA T:[Device] HID:[PNP0C0F] UID:[1] STA:[0xb]
1963 Current state:
1964 >Trigger by Level, Polarity Low, Sharable IRQ-11
1965 > ENDTAG
1966 Possible State:
1967 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
1968 > ENDTAG
1969 |
1970 +*_HID T:[Integer]
1971 |
1972 +*_UID T:[Integer]
1973 |
1974 +*_STA T:[Method]
1975 |
1976 +*_PRS T:[Method]
1977 |
1978 +*_DIS T:[Method]
1979 |
1980 +*_CRS T:[Method]
1981 |
1982 +*_SRS T:[Method]
1983 |
1984 +*LNKB T:[Device] HID:[PNP0C0F] UID:[2] STA:[0xb]
1985 Current state:
1986 >Trigger by Level, Polarity Low, Sharable IRQ-4
1987 > ENDTAG
1988 Possible State:
1989 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
1990 > ENDTAG
1991 |
1992 +*_HID T:[Integer]
1993 |
1994 +*_UID T:[Integer]
1995 |
1996 +*_STA T:[Method]
1997 |
1998 +*_PRS T:[Method]
1999 |
2000 +*_DIS T:[Method]
2001 |
2002 +*_CRS T:[Method]
2003 |
2004 +*_SRS T:[Method]
2005 |
2006 +*LNKC T:[Device] HID:[PNP0C0F] UID:[3] STA:[0xb]
2007 Current state:
2008 >Trigger by Level, Polarity Low, Sharable IRQ-3
2009 > ENDTAG
2010 Possible State:
2011 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2012 > ENDTAG
2013 |
2014 +*_HID T:[Integer]
2015 |
2016 +*_UID T:[Integer]
2017 |
2018 +*_STA T:[Method]
2019 |
2020 +*_PRS T:[Method]
2021 |
2022 +*_DIS T:[Method]
2023 |
2024 +*_CRS T:[Method]
2025 |
2026 +*_SRS T:[Method]
2027 |
2028 +*LNKD T:[Device] HID:[PNP0C0F] UID:[4] STA:[0xb]
2029 Current state:
2030 >Trigger by Level, Polarity Low, Sharable IRQ-11
2031 > ENDTAG
2032 Possible State:
2033 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2034 > ENDTAG
2035 |
2036 +*_HID T:[Integer]
2037 |
2038 +*_UID T:[Integer]
2039 |
2040 +*_STA T:[Method]
2041 |
2042 +*_PRS T:[Method]
2043 |
2044 +*_DIS T:[Method]
2045 |
2046 +*_CRS T:[Method]
2047 |
2048 +*_SRS T:[Method]
2049 |
2050 +*LNKE T:[Device] HID:[PNP0C0F] UID:[5] STA:[0xb]
2051 Current state:
2052 >Trigger by Level, Polarity Low, Sharable IRQ-0
2053 > ENDTAG
2054 Possible State:
2055 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2056 > ENDTAG
2057 |
2058 +*_HID T:[Integer]
2059 |
2060 +*_UID T:[Integer]
2061 |
2062 +*_STA T:[Method]
2063 |
2064 +*_PRS T:[Method]
2065 |
2066 +*_DIS T:[Method]
2067 |
2068 +*_CRS T:[Method]
2069 |
2070 +*_SRS T:[Method]
2071 |
2072 +*LNKF T:[Device] HID:[PNP0C0F] UID:[6] STA:[0xb]
2073 Current state:
2074 >Trigger by Level, Polarity Low, Sharable IRQ-10
2075 > ENDTAG
2076 Possible State:
2077 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2078 > ENDTAG
2079 |
2080 +*_HID T:[Integer]
2081 |
2082 +*_UID T:[Integer]
2083 |
2084 +*_STA T:[Method]
2085 |
2086 +*_PRS T:[Method]
2087 |
2088 +*_DIS T:[Method]
2089 |
2090 +*_CRS T:[Method]
2091 |
2092 +*_SRS T:[Method]
2093 |
2094 +*LNKG T:[Device] HID:[PNP0C0F] UID:[7] STA:[0xb]
2095 Current state:
2096 >Trigger by Level, Polarity Low, Sharable IRQ-7
2097 > ENDTAG
2098 Possible State:
2099 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2100 > ENDTAG
2101 |
2102 +*_HID T:[Integer]
2103 |
2104 +*_UID T:[Integer]
2105 |
2106 +*_STA T:[Method]
2107 |
2108 +*_PRS T:[Method]
2109 |
2110 +*_DIS T:[Method]
2111 |
2112 +*_CRS T:[Method]
2113 |
2114 +*_SRS T:[Method]
2115 |
2116 +*LNKH T:[Device] HID:[PNP0C0F] UID:[8] STA:[0xb]
2117 Current state:
2118 >Trigger by Level, Polarity Low, Sharable IRQ-10
2119 > ENDTAG
2120 Possible State:
2121 >Trigger by Level, Polarity Low, Sharable IRQ-3 IRQ-4 IRQ-5 IRQ-6 IRQ-7 IRQ-10 IRQ-11 IRQ-12 IRQ-14 IRQ-15
2122 > ENDTAG
2123 |
2124 +*_HID T:[Integer]
2125 |
2126 +*_UID T:[Integer]
2127 |
2128 +*_STA T:[Method]
2129 |
2130 +*_PRS T:[Method]
2131 |
2132 +*_DIS T:[Method]
2133 |
2134 +*_CRS T:[Method]
2135 |
2136 +*_SRS T:[Method]
2137 |
2138 +*RMEM T:[Device] HID:[PNP0C01] UID:[1] STA:[0xffffffff]
2139 Current state:
2140 Possible State:
2141 |
2142 +*_HID T:[Integer]
2143 |
2144 +*_UID T:[Integer]
2145 |
2146 +*SMIR T:[Region]
2147 |
2148 +*SE__ T:[RegionField]
2149 |
2150 +*SS__ T:[RegionField]
2151 |
2152 +*ITKS T:[Method]
2153 |
2154 +*ITKW T:[Method]
2155 |
2156 +*IRA0 T:[BufferField]
2157|
2158+*_SI_ T:[Scope]
2159|
2160+*_TZ_ T:[Device] STA:[0xffffffff]
2161 Current state:
2162 Possible State:
2163|
2164+*_REV T:[Integer]
2165|
2166+*_OS_ T:[String]
2167|
2168+*_GL_ T:[Mutex]
2169|
2170+*_OSI T:[Method]
2171|
2172+*SP1O T:[Integer]
2173|
2174+*IOCE T:[Integer]
2175|
2176+*IOCL T:[Integer]
2177|
2178+*SI1P T:[Integer]
2179|
2180+*PEBS T:[Integer]
2181|
2182+*PEBL T:[Integer]
2183|
2184+*SRCB T:[Integer]
2185|
2186+*SRCL T:[Integer]
2187|
2188+*SUSW T:[Integer]
2189|
2190+*PMBS T:[Integer]
2191|
2192+*PMLN T:[Integer]
2193|
2194+*SMIP T:[Integer]
2195|
2196+*APCB T:[Integer]
2197|
2198+*APCL T:[Integer]
2199|
2200+*PM00 T:[Integer]
2201|
2202+*PM20 T:[Integer]
2203|
2204+*PM30 T:[Integer]
2205|
2206+*SMBS T:[Integer]
2207|
2208+*SMBL T:[Integer]
2209|
2210+*HPTB T:[Integer]
2211|
2212+*HPTC T:[Integer]
2213|
2214+*GPBS T:[Integer]
2215|
2216+*GPLN T:[Integer]
2217|
2218+*ACPH T:[Integer]
2219|
2220+*ASSB T:[Integer]
2221|
2222+*AOTB T:[Integer]
2223|
2224+*AAXB T:[Integer]
2225|
2226+*PEHP T:[Integer]
2227|
2228+*SHPC T:[Integer]
2229|
2230+*PEPM T:[Integer]
2231|
2232+*PEER T:[Integer]
2233|
2234+*PECS T:[Integer]
2235|
2236+*TOBS T:[Integer]
2237|
2238+*SUCC T:[Integer]
2239|
2240+*NVLD T:[Integer]
2241|
2242+*CRIT T:[Integer]
2243|
2244+*NCRT T:[Integer]
2245|
2246+*LDST T:[Integer]
2247|
2248+*VRBS T:[Integer]
2249|
2250+*IGDS T:[Integer]
2251|
2252+*DPSD T:[Integer]
2253|
2254+*ITKE T:[Integer]
2255|
2256+*RRIO T:[Method]
2257|
2258+*RDMA T:[Method]
2259|
2260+*PICM T:[Integer]
2261|
2262+*_PIC T:[Method]
2263|
2264+*OSVR T:[Integer]
2265|
2266+*OSFL T:[Method]
2267|
2268+*MCTH T:[Method]
2269|
2270+*PRWP T:[Package]
2271|
2272+*GPRW T:[Method]
2273|
2274+*WAKP T:[Package]
2275|
2276+*DEB0 T:[Region]
2277|
2278+*DBG8 T:[RegionField]
2279|
2280+*DEB1 T:[Region]
2281|
2282+*DBG9 T:[RegionField]
2283|
2284+*SS1_ T:[Integer]
2285|
2286+*SS2_ T:[Integer]
2287|
2288+*SS3_ T:[Integer]
2289|
2290+*SS4_ T:[Integer]
2291|
2292+*IOST T:[Integer]
2293|
2294+*TOPM T:[Integer]
2295|
2296+*ROMS T:[Integer]
2297|
2298+*MG1B T:[Integer]
2299|
2300+*MG1L T:[Integer]
2301|
2302+*MG2B T:[Integer]
2303|
2304+*MG2L T:[Integer]
2305|
2306+*PIRA T:[RegionField]
2307|
2308+*PIRB T:[RegionField]
2309|
2310+*PIRC T:[RegionField]
2311|
2312+*PIRD T:[RegionField]
2313|
2314+*PIRE T:[RegionField]
2315|
2316+*PIRF T:[RegionField]
2317|
2318+*PIRG T:[RegionField]
2319|
2320+*PIRH T:[RegionField]
2321|
2322+*WOTB T:[Integer]
2323|
2324+*WSSB T:[Integer]
2325|
2326+*WAXB T:[Integer]
2327|
2328+*_PTS T:[Method]
2329|
2330+*_WAK T:[Method]
2331|
2332+*OMSC T:[Device] HID:[PNP0C02] UID:[3601] STA:[0xffffffff]
2333 Current state:
2334 Possible State:
2335 |
2336 +*_HID T:[Integer]
2337 |
2338 +*_UID T:[Integer]
2339|
2340+*ASLA T:[Integer]
2341|
2342+*PVID T:[Integer]
2343|
2344+*_S0_ T:[Package]
2345|
2346+*_S5_ T:[Package]
2347|
2348+*PTS_ T:[Method]
2349|
2350+*WAK_ T:[Method]
2351|
2352+*_S3_ T:[Package]
2353|
2354+*_S4_ T:[Package]
2355Status 0x0 0 - No error