Ticket #280: acpitree.log

File acpitree.log, 40.2 KB (added by valerius, 16 years ago)
Line 
1******** ACPI Tree test Programm *********
2Test AcpiWalkNameSpace
3@
4|
5+*_GPE T:[Scope]
6 |
7 +*_L01 T:[Method]
8 |
9 +*_L05 T:[Method]
10 |
11 +*_L09 T:[Method]
12 |
13 +*_L0B T:[Method]
14 |
15 +*_L1D T:[Method]
16|
17+*_PR_ T:[Scope]
18 |
19 +*CPU0 T:[Processor]
20 |
21 +*_PPC T:[Method]
22 |
23 +*_PCT T:[Method]
24 |
25 +*_PSS T:[Method]
26 |
27 +*SPSS T:[Package]
28 |
29 +*NPSS T:[Package]
30 |
31 +*_CST T:[Method]
32 |
33 +*HI0_ T:[Integer]
34 |
35 +*HC0_ T:[Integer]
36 |
37 +*_PDC T:[Method]
38 |
39 +*CPU1 T:[Processor]
40 |
41 +*HI1_ T:[Integer]
42 |
43 +*HC1_ T:[Integer]
44 |
45 +*_PDC T:[Method]
46|
47+*_SB_ T:[Device] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
48 Current state:
49 Possible State:
50 |
51 +*LID0 T:[Device] HID:[PNP0C0D] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
52 Current state:
53 Possible State:
54 |
55 +*_HID T:[Integer]
56 |
57 +*_LID T:[Method]
58 |
59 +*_PSW T:[Method]
60 |
61 +*_PRW T:[Package]
62 |
63 +*SLPB T:[Device] HID:[PNP0C0E] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
64 Current state:
65 Possible State:
66 |
67 +*_HID T:[Integer]
68 |
69 +*_PRW T:[Package]
70 |
71 +*PCI0 T:[Device] HID:[PNP0A03] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
72 Current state:
73 > ADDRESS16:[2 0x0 Len:256]
74 > ADDRESS32:[1 0x0 Len:3320]
75 > IO:[1 0xcf8 - 0xcf8 Al:1 Len:8]
76 > ADDRESS32:[1 0xd00 Len:62208]
77 > ADDRESS32:[0 0xa0000 Len:131072]
78 > ADDRESS32:[0 0xc0000 Len:0]
79 > ADDRESS32:[0 0xc4000 Len:0]
80 > ADDRESS32:[0 0xc8000 Len:0]
81 > ADDRESS32:[0 0xcc000 Len:0]
82 > ADDRESS32:[0 0xd0000 Len:16384]
83 > ADDRESS32:[0 0xd4000 Len:16384]
84 > ADDRESS32:[0 0xd8000 Len:16384]
85 > ADDRESS32:[0 0xdc000 Len:0]
86 > ADDRESS32:[0 0xe0000 Len:0]
87 > ADDRESS32:[0 0xe4000 Len:0]
88 > ADDRESS32:[0 0xe8000 Len:0]
89 > ADDRESS32:[0 0xec000 Len:0]
90 > ADDRESS32:[0 0xf0000 Len:0]
91 > ADDRESS32:[0 0x80000000 Len:2126512128]
92 > ENDTAG
93 Possible State:
94 |
95 +*_INI T:[Method]
96 |
97 +*_S3D T:[Method]
98 |
99 +*_S4D T:[Method]
100 |
101 +*_HID T:[Integer]
102 |
103 +*_ADR T:[Integer]
104 |
105 +*_BBN T:[Integer]
106 |
107 +*HBUS T:[Region]
108 |
109 +*PM0H T:[RegionField]
110 |
111 +*PM1L T:[RegionField]
112 |
113 +*PM1H T:[RegionField]
114 |
115 +*PM2L T:[RegionField]
116 |
117 +*PM2H T:[RegionField]
118 |
119 +*PM3L T:[RegionField]
120 |
121 +*PM3H T:[RegionField]
122 |
123 +*PM4L T:[RegionField]
124 |
125 +*PM4H T:[RegionField]
126 |
127 +*PM5L T:[RegionField]
128 |
129 +*PM5H T:[RegionField]
130 |
131 +*PM6L T:[RegionField]
132 |
133 +*PM6H T:[RegionField]
134 |
135 +*HENA T:[RegionField]
136 |
137 +*TOUD T:[RegionField]
138 |
139 +*BUF0 T:[Buffer]
140 |
141 +*_CRS T:[Method]
142 |
143 +*_PRT T:[Method]
144 |
145 +*PEGP T:[Device] ADR:[0x10000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
146 Current state:
147 Possible State:
148 |
149 +*_ADR T:[Integer]
150 |
151 +*VGA_ T:[Device] ADR:[0x0] STA:[0xf] SxD State:[0xff:ff:ff:ff]
152 Current state:
153 Possible State:
154 |
155 +*_ADR T:[Integer]
156 |
157 +*_STA T:[Method]
158 |
159 +*CRTC T:[Integer]
160 |
161 +*CRTN T:[Integer]
162 |
163 +*LCDC T:[Integer]
164 |
165 +*LCDN T:[Integer]
166 |
167 +*SWIH T:[Integer]
168 |
169 +*VDEV T:[Method]
170 |
171 +*_DOS T:[Method]
172 |
173 +*_DOD T:[Method]
174 |
175 +*CRT_ T:[Device] ADR:[0x100] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
176 Current state:
177 Possible State:
178 |
179 +*_ADR T:[Integer]
180 |
181 +*_DCS T:[Method]
182 |
183 +*_DGS T:[Method]
184 |
185 +*_DSS T:[Method]
186 |
187 +*LCD_ T:[Device] ADR:[0x110] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
188 Current state:
189 Possible State:
190 |
191 +*_ADR T:[Integer]
192 |
193 +*_DCS T:[Method]
194 |
195 +*_DGS T:[Method]
196 |
197 +*_DSS T:[Method]
198 |
199 +*_DDC T:[Method]
200 |
201 +*TVO_ T:[Device] ADR:[0x200] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
202 Current state:
203 Possible State:
204 |
205 +*_ADR T:[Integer]
206 |
207 +*_DCS T:[Method]
208 |
209 +*_DGS T:[Method]
210 |
211 +*_DSS T:[Method]
212 |
213 +*_DDC T:[Method]
214 |
215 +*DDC0 T:[Buffer]
216 |
217 +*DDC3 T:[Buffer]
218 |
219 +*DDC4 T:[Buffer]
220 |
221 +*_PRT T:[Method]
222 |
223 +*GFX0 T:[Device] ADR:[0x20000] STA:[0x0] SxD State:[0xff:ff:ff:ff]
224 Current state:
225 Possible State:
226 |
227 +*_ADR T:[Integer]
228 |
229 +*_STA T:[Method]
230 |
231 +*VNVS T:[Region]
232 |
233 +*VBF1 T:[RegionField]
234 |
235 +*VBF2 T:[RegionField]
236 |
237 +*_DOS T:[Method]
238 |
239 +*_DOD T:[Method]
240 |
241 +*DD01 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
242 Current state:
243 Possible State:
244 |
245 +*_ADR T:[Method]
246 |
247 +*_DCS T:[Method]
248 |
249 +*_DGS T:[Method]
250 |
251 +*_DSS T:[Method]
252 |
253 +*DD02 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
254 Current state:
255 Possible State:
256 |
257 +*_ADR T:[Method]
258 |
259 +*_DCS T:[Method]
260 |
261 +*_DGS T:[Method]
262 |
263 +*_DSS T:[Method]
264 |
265 +*DD03 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
266 Current state:
267 Possible State:
268 |
269 +*_ADR T:[Method]
270 |
271 +*_DCS T:[Method]
272 |
273 +*_DGS T:[Method]
274 |
275 +*_DSS T:[Method]
276 |
277 +*DD04 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
278 Current state:
279 Possible State:
280 |
281 +*_ADR T:[Method]
282 |
283 +*_DCS T:[Method]
284 |
285 +*_DGS T:[Method]
286 |
287 +*_DSS T:[Method]
288 |
289 +*DD05 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
290 Current state:
291 Possible State:
292 |
293 +*_ADR T:[Method]
294 |
295 +*_DCS T:[Method]
296 |
297 +*_DGS T:[Method]
298 |
299 +*_DSS T:[Method]
300 |
301 +*AZAL T:[Device] ADR:[0x1b0000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
302 Current state:
303 Possible State:
304 |
305 +*_ADR T:[Integer]
306 |
307 +*_PRW T:[Package]
308 |
309 +*_PS3 T:[Method]
310 |
311 +*_PS0 T:[Method]
312 |
313 +*RP01 T:[Device] ADR:[0x1c0000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
314 Current state:
315 Possible State:
316 |
317 +*_ADR T:[Integer]
318 |
319 +*P1CS T:[Region]
320 |
321 +*ABP1 T:[RegionField]
322 |
323 +*PDC1 T:[RegionField]
324 |
325 +*PDS1 T:[RegionField]
326 |
327 +*PSP1 T:[RegionField]
328 |
329 +*HPCS T:[RegionField]
330 |
331 +*PMCS T:[RegionField]
332 |
333 +*PXS1 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
334 Current state:
335 Possible State:
336 |
337 +*_ADR T:[Integer]
338 |
339 +*_RMV T:[Method]
340 |
341 +*_PRW T:[Package]
342 |
343 +*_PRT T:[Method]
344 |
345 +*RP02 T:[Device] ADR:[0x1c0001] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
346 Current state:
347 Possible State:
348 |
349 +*_ADR T:[Integer]
350 |
351 +*P2CS T:[Region]
352 |
353 +*ABP2 T:[RegionField]
354 |
355 +*PDC2 T:[RegionField]
356 |
357 +*PDS2 T:[RegionField]
358 |
359 +*PSP2 T:[RegionField]
360 |
361 +*HPCS T:[RegionField]
362 |
363 +*PMCS T:[RegionField]
364 |
365 +*PXS2 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
366 Current state:
367 Possible State:
368 |
369 +*_ADR T:[Integer]
370 |
371 +*_RMV T:[Method]
372 |
373 +*_PRW T:[Package]
374 |
375 +*_PRT T:[Method]
376 |
377 +*RP03 T:[Device] ADR:[0x1c0002] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
378 Current state:
379 Possible State:
380 |
381 +*_ADR T:[Integer]
382 |
383 +*P3CS T:[Region]
384 |
385 +*ABP3 T:[RegionField]
386 |
387 +*PDC3 T:[RegionField]
388 |
389 +*PDS3 T:[RegionField]
390 |
391 +*PSP3 T:[RegionField]
392 |
393 +*HPCS T:[RegionField]
394 |
395 +*PMCS T:[RegionField]
396 |
397 +*PXS0 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
398 Current state:
399 Possible State:
400 |
401 +*_ADR T:[Integer]
402 |
403 +*_RMV T:[Method]
404 |
405 +*_PRW T:[Package]
406 |
407 +*_PRT T:[Method]
408 |
409 +*RP04 T:[Device] ADR:[0x1c0003] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
410 Current state:
411 Possible State:
412 |
413 +*_ADR T:[Integer]
414 |
415 +*P4CS T:[Region]
416 |
417 +*ABP4 T:[RegionField]
418 |
419 +*PDC4 T:[RegionField]
420 |
421 +*PDS4 T:[RegionField]
422 |
423 +*PSP4 T:[RegionField]
424 |
425 +*HPCS T:[RegionField]
426 |
427 +*PMCS T:[RegionField]
428 |
429 +*_PRW T:[Package]
430 |
431 +*_PRT T:[Method]
432 |
433 +*USB1 T:[Device] ADR:[0x1d0000] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
434 Current state:
435 Possible State:
436 |
437 +*_ADR T:[Integer]
438 |
439 +*_S3D T:[Method]
440 |
441 +*_S4D T:[Method]
442 |
443 +*USB2 T:[Device] ADR:[0x1d0001] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
444 Current state:
445 Possible State:
446 |
447 +*_ADR T:[Integer]
448 |
449 +*_S3D T:[Method]
450 |
451 +*_S4D T:[Method]
452 |
453 +*USB3 T:[Device] ADR:[0x1d0002] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
454 Current state:
455 Possible State:
456 |
457 +*_ADR T:[Integer]
458 |
459 +*_S3D T:[Method]
460 |
461 +*_S4D T:[Method]
462 |
463 +*USB4 T:[Device] ADR:[0x1d0003] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
464 Current state:
465 Possible State:
466 |
467 +*_ADR T:[Integer]
468 |
469 +*_S3D T:[Method]
470 |
471 +*_S4D T:[Method]
472 |
473 +*USB7 T:[Device] ADR:[0x1d0007] STA:[0xffffffff] SxD State:[0xff:ff:02:02]
474 Current state:
475 Possible State:
476 |
477 +*_ADR T:[Integer]
478 |
479 +*_S3D T:[Method]
480 |
481 +*_S4D T:[Method]
482 |
483 +*PCIB T:[Device] ADR:[0x1e0000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
484 Current state:
485 Possible State:
486 |
487 +*_ADR T:[Integer]
488 |
489 +*CBS0 T:[Device] ADR:[0x90000] STA:[0xf] SxD State:[0xff:ff:03:03]
490 Current state:
491 Possible State:
492 |
493 +*_ADR T:[Integer]
494 |
495 +*_STA T:[Method]
496 |
497 +*_S3D T:[Method]
498 |
499 +*_S4D T:[Method]
500 |
501 +*LANB T:[Device] ADR:[0x70000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
502 Current state:
503 Possible State:
504 |
505 +*_PS3 T:[Method]
506 |
507 +*_PS0 T:[Method]
508 |
509 +*_ADR T:[Integer]
510 |
511 +*_PRW T:[Package]
512 |
513 +*_PRT T:[Method]
514 |
515 +*AUD0 T:[Device] ADR:[0x1e0002] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
516 Current state:
517 Possible State:
518 |
519 +*_ADR T:[Integer]
520 |
521 +*MODM T:[Device] ADR:[0x1e0003] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
522 Current state:
523 Possible State:
524 |
525 +*_ADR T:[Integer]
526 |
527 +*_PRW T:[Package]
528 |
529 +*LPCB T:[Device] ADR:[0x1f0000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
530 Current state:
531 Possible State:
532 |
533 +*_ADR T:[Integer]
534 |
535 +*LPC0 T:[Region]
536 |
537 +*PARC T:[RegionField]
538 |
539 +*PBRC T:[RegionField]
540 |
541 +*PCRC T:[RegionField]
542 |
543 +*PDRC T:[RegionField]
544 |
545 +*PERC T:[RegionField]
546 |
547 +*PFRC T:[RegionField]
548 |
549 +*PGRC T:[RegionField]
550 |
551 +*PHRC T:[RegionField]
552 |
553 +*LDE0 T:[RegionField]
554 |
555 +*IOD1 T:[RegionField]
556 |
557 +*LNKA T:[Device] HID:[PNP0C0F] UID:[1] STA:[0xb] SxD State:[0xff:ff:ff:ff]
558 Current state:
559 >Trigger by Level, Polarity Low, Sharable IRQ-10
560 > ENDTAG
561 Possible State:
562 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
563 > ENDTAG
564 |
565 +*_HID T:[Integer]
566 |
567 +*_UID T:[Integer]
568 |
569 +*_DIS T:[Method]
570 |
571 +*_PRS T:[Buffer]
572 |
573 +*_CRS T:[Method]
574 |
575 +*_SRS T:[Method]
576 |
577 +*_STA T:[Method]
578 |
579 +*LNKB T:[Device] HID:[PNP0C0F] UID:[2] STA:[0xb] SxD State:[0xff:ff:ff:ff]
580 Current state:
581 >Trigger by Level, Polarity Low, Sharable IRQ-11
582 > ENDTAG
583 Possible State:
584 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
585 > ENDTAG
586 |
587 +*_HID T:[Integer]
588 |
589 +*_UID T:[Integer]
590 |
591 +*_DIS T:[Method]
592 |
593 +*_PRS T:[Buffer]
594 |
595 +*_CRS T:[Method]
596 |
597 +*_SRS T:[Method]
598 |
599 +*_STA T:[Method]
600 |
601 +*LNKC T:[Device] HID:[PNP0C0F] UID:[3] STA:[0xb] SxD State:[0xff:ff:ff:ff]
602 Current state:
603 >Trigger by Level, Polarity Low, Sharable IRQ-11
604 > ENDTAG
605 Possible State:
606 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
607 > ENDTAG
608 |
609 +*_HID T:[Integer]
610 |
611 +*_UID T:[Integer]
612 |
613 +*_DIS T:[Method]
614 |
615 +*_PRS T:[Buffer]
616 |
617 +*_CRS T:[Method]
618 |
619 +*_SRS T:[Method]
620 |
621 +*_STA T:[Method]
622 |
623 +*LNKD T:[Device] HID:[PNP0C0F] UID:[4] STA:[0xb] SxD State:[0xff:ff:ff:ff]
624 Current state:
625 >Trigger by Level, Polarity Low, Sharable IRQ-11
626 > ENDTAG
627 Possible State:
628 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
629 > ENDTAG
630 |
631 +*_HID T:[Integer]
632 |
633 +*_UID T:[Integer]
634 |
635 +*_DIS T:[Method]
636 |
637 +*_PRS T:[Buffer]
638 |
639 +*_CRS T:[Method]
640 |
641 +*_SRS T:[Method]
642 |
643 +*_STA T:[Method]
644 |
645 +*LNKE T:[Device] HID:[PNP0C0F] UID:[5] STA:[0xb] SxD State:[0xff:ff:ff:ff]
646 Current state:
647 >Trigger by Level, Polarity Low, Sharable IRQ-10
648 > ENDTAG
649 Possible State:
650 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
651 > ENDTAG
652 |
653 +*_HID T:[Integer]
654 |
655 +*_UID T:[Integer]
656 |
657 +*_DIS T:[Method]
658 |
659 +*_PRS T:[Buffer]
660 |
661 +*_CRS T:[Method]
662 |
663 +*_SRS T:[Method]
664 |
665 +*_STA T:[Method]
666 |
667 +*LNKF T:[Device] HID:[PNP0C0F] UID:[6] STA:[0xb] SxD State:[0xff:ff:ff:ff]
668 Current state:
669 >Trigger by Level, Polarity Low, Sharable IRQ-10
670 > ENDTAG
671 Possible State:
672 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
673 > ENDTAG
674 |
675 +*_HID T:[Integer]
676 |
677 +*_UID T:[Integer]
678 |
679 +*_DIS T:[Method]
680 |
681 +*_PRS T:[Buffer]
682 |
683 +*_CRS T:[Method]
684 |
685 +*_SRS T:[Method]
686 |
687 +*_STA T:[Method]
688 |
689 +*LNKG T:[Device] HID:[PNP0C0F] UID:[7] STA:[0xb] SxD State:[0xff:ff:ff:ff]
690 Current state:
691 >Trigger by Level, Polarity Low, Sharable IRQ-10
692 > ENDTAG
693 Possible State:
694 >Trigger by Level, Polarity Low, Sharable IRQ-11
695 > ENDTAG
696 |
697 +*_HID T:[Integer]
698 |
699 +*_UID T:[Integer]
700 |
701 +*_DIS T:[Method]
702 |
703 +*_PRS T:[Buffer]
704 |
705 +*_CRS T:[Method]
706 |
707 +*_SRS T:[Method]
708 |
709 +*_STA T:[Method]
710 |
711 +*LNKH T:[Device] HID:[PNP0C0F] UID:[8] STA:[0xb] SxD State:[0xff:ff:ff:ff]
712 Current state:
713 >Trigger by Level, Polarity Low, Sharable IRQ-11
714 > ENDTAG
715 Possible State:
716 >Trigger by Level, Polarity Low, Sharable IRQ-10 IRQ-11
717 > ENDTAG
718 |
719 +*_HID T:[Integer]
720 |
721 +*_UID T:[Integer]
722 |
723 +*_DIS T:[Method]
724 |
725 +*_PRS T:[Buffer]
726 |
727 +*_CRS T:[Method]
728 |
729 +*_SRS T:[Method]
730 |
731 +*_STA T:[Method]
732 |
733 +*EC0_ T:[Device] HID:[PNP0C09] STA:[0xf] SxD State:[0xff:ff:ff:ff]
734 Current state:
735 > IO:[1 0x62 - 0x62 Al:0 Len:1]
736 > IO:[1 0x66 - 0x66 Al:0 Len:1]
737 > ENDTAG
738 Possible State:
739 |
740 +*_HID T:[Integer]
741 |
742 +*_GPE T:[Integer]
743 |
744 +*_STA T:[Method]
745 |
746 +*_CRS T:[Buffer]
747 |
748 +*ECO1 T:[Region]
749 |
750 +*PX62 T:[RegionField]
751 |
752 +*ECO2 T:[Region]
753 |
754 +*PX66 T:[RegionField]
755 |
756 +*RAM_ T:[Region]
757 |
758 +*ECMD T:[RegionField]
759 |
760 +*EDAT T:[RegionField]
761 |
762 +*BLNK T:[RegionField]
763 |
764 +*KLID T:[RegionField]
765 |
766 +*KACS T:[RegionField]
767 |
768 +*DCST T:[RegionField]
769 |
770 +*MTST T:[RegionField]
771 |
772 +*KBID T:[RegionField]
773 |
774 +*KEYW T:[RegionField]
775 |
776 +*TPDW T:[RegionField]
777 |
778 +*LIDW T:[RegionField]
779 |
780 +*BL2W T:[RegionField]
781 |
782 +*TIID T:[RegionField]
783 |
784 +*KTEE T:[RegionField]
785 |
786 +*KPPS T:[RegionField]
787 |
788 +*TTID T:[RegionField]
789 |
790 +*KCSS T:[RegionField]
791 |
792 +*KCTT T:[RegionField]
793 |
794 +*KDTT T:[RegionField]
795 |
796 +*KOSD T:[RegionField]
797 |
798 +*KVTP T:[RegionField]
799 |
800 +*THS0 T:[RegionField]
801 |
802 +*THS1 T:[RegionField]
803 |
804 +*THS2 T:[RegionField]
805 |
806 +*THS3 T:[RegionField]
807 |
808 +*THS4 T:[RegionField]
809 |
810 +*THS5 T:[RegionField]
811 |
812 +*THS6 T:[RegionField]
813 |
814 +*THS7 T:[RegionField]
815 |
816 +*KTAF T:[RegionField]
817 |
818 +*THSL T:[RegionField]
819 |
820 +*TS2H T:[RegionField]
821 |
822 +*TS3L T:[RegionField]
823 |
824 +*TS3H T:[RegionField]
825 |
826 +*TS4L T:[RegionField]
827 |
828 +*TS4H T:[RegionField]
829 |
830 +*TS5L T:[RegionField]
831 |
832 +*TS5H T:[RegionField]
833 |
834 +*TS6_ T:[RegionField]
835 |
836 +*_REG T:[Method]
837 |
838 +*_Q17 T:[Method]
839 |
840 +*VTPE T:[Integer]
841 |
842 +*_Q19 T:[Method]
843 |
844 +*_Q80 T:[Method]
845 |
846 +*_Q81 T:[Method]
847 |
848 +*_Q82 T:[Method]
849 |
850 +*_Q84 T:[Method]
851 |
852 +*_Q1A T:[Method]
853 |
854 +*_Q5C T:[Method]
855 |
856 +*_Q5D T:[Method]
857 |
858 +*_Q10 T:[Method]
859 |
860 +*_Q11 T:[Method]
861 |
862 +*_Q12 T:[Method]
863 |
864 +*_Q13 T:[Method]
865 |
866 +*_Q14 T:[Method]
867 |
868 +*_Q15 T:[Method]
869 |
870 +*_Q33 T:[Method]
871 |
872 +*_Q34 T:[Method]
873 |
874 +*_Q35 T:[Method]
875 |
876 +*_Q36 T:[Method]
877 |
878 +*_Q40 T:[Method]
879 |
880 +*_Q41 T:[Method]
881 |
882 +*_Q48 T:[Method]
883 |
884 +*_Q4C T:[Method]
885 |
886 +*_Q50 T:[Method]
887 |
888 +*_Q51 T:[Method]
889 |
890 +*_Q52 T:[Method]
891 |
892 +*_Q53 T:[Method]
893 |
894 +*NBID T:[RegionField]
895 |
896 +*NB0A T:[RegionField]
897 |
898 +*NBL2 T:[RegionField]
899 |
900 +*NB1A T:[RegionField]
901 |
902 +*NB0S T:[RegionField]
903 |
904 +*NB1S T:[RegionField]
905 |
906 +*BSRC T:[RegionField]
907 |
908 +*BSFC T:[RegionField]
909 |
910 +*BSPE T:[RegionField]
911 |
912 +*BSAC T:[RegionField]
913 |
914 +*BSVO T:[RegionField]
915 |
916 +*BSCM T:[RegionField]
917 |
918 +*BSCU T:[RegionField]
919 |
920 +*BSDC T:[RegionField]
921 |
922 +*BSDV T:[RegionField]
923 |
924 +*BSSN T:[RegionField]
925 |
926 +*BSMN T:[RegionField]
927 |
928 +*BSDN T:[RegionField]
929 |
930 +*BSCH T:[RegionField]
931 |
932 +*BATM T:[Mutex]
933 |
934 +*GBIF T:[Method]
935 |
936 +*GBST T:[Method]
937 |
938 +*B0ST T:[Integer]
939 |
940 +*BAT0 T:[Device] HID:[PNP0C0A] UID:[1] STA:[0x1f] SxD State:[0xff:ff:ff:ff]
941 Current state:
942 Possible State:
943 |
944 +*_HID T:[Integer]
945 |
946 +*_UID T:[Integer]
947 |
948 +*_PCL T:[Method]
949 |
950 +*B0IP T:[Package]
951 |
952 +*B0SP T:[Package]
953 |
954 +*_STA T:[Method]
955 |
956 +*_BIF T:[Method]
957 |
958 +*_BST T:[Method]
959 |
960 +*ACST T:[Integer]
961 |
962 +*ADP1 T:[Device] HID:[ACPI0003] STA:[0xf] SxD State:[0xff:ff:ff:ff]
963 Current state:
964 Possible State:
965 |
966 +*_HID T:[String]
967 |
968 +*_PSR T:[Method]
969 |
970 +*_PCL T:[Method]
971 |
972 +*_STA T:[Method]
973 |
974 +*DMAC T:[Device] HID:[PNP0200] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
975 Current state:
976 > IO:[1 0x0 - 0x0 Al:1 Len:32]
977 > IO:[1 0x81 - 0x81 Al:1 Len:17]
978 > IO:[1 0x93 - 0x93 Al:1 Len:13]
979 > IO:[1 0xc0 - 0xc0 Al:1 Len:32]
980 > DMA-4
981 > ENDTAG
982 Possible State:
983 |
984 +*_HID T:[Integer]
985 |
986 +*_CRS T:[Buffer]
987 |
988 +*FWHD T:[Device] HID:[INT0800] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
989 Current state:
990 > FIXED-MEM32:[0 0xff800000 Len:8388608]
991 > ENDTAG
992 Possible State:
993 |
994 +*_HID T:[Integer]
995 |
996 +*_CRS T:[Buffer]
997 |
998 +*HPET T:[Device] HID:[PNP0103] STA:[0x0] SxD State:[0xff:ff:ff:ff]
999 Current state:
1000 >Trigger by Edge, Polarity High IRQ-0
1001 >Trigger by Edge, Polarity High IRQ-8
1002 > FIXED-MEM32:[0 0xfed00000 Len:1024]
1003 > ENDTAG
1004 Possible State:
1005 |
1006 +*_HID T:[Integer]
1007 |
1008 +*BUF0 T:[Buffer]
1009 |
1010 +*_STA T:[Method]
1011 |
1012 +*_CRS T:[Method]
1013 |
1014 +*IPIC T:[Device] HID:[PNP0000] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1015 Current state:
1016 > IO:[1 0x20 - 0x20 Al:1 Len:2]
1017 > IO:[1 0x24 - 0x24 Al:1 Len:2]
1018 > IO:[1 0x28 - 0x28 Al:1 Len:2]
1019 > IO:[1 0x2c - 0x2c Al:1 Len:2]
1020 > IO:[1 0x30 - 0x30 Al:1 Len:2]
1021 > IO:[1 0x34 - 0x34 Al:1 Len:2]
1022 > IO:[1 0x38 - 0x38 Al:1 Len:2]
1023 > IO:[1 0x3c - 0x3c Al:1 Len:2]
1024 > IO:[1 0xa0 - 0xa0 Al:1 Len:2]
1025 > IO:[1 0xa4 - 0xa4 Al:1 Len:2]
1026 > IO:[1 0xa8 - 0xa8 Al:1 Len:2]
1027 > IO:[1 0xac - 0xac Al:1 Len:2]
1028 > IO:[1 0xb0 - 0xb0 Al:1 Len:2]
1029 > IO:[1 0xb4 - 0xb4 Al:1 Len:2]
1030 > IO:[1 0xb8 - 0xb8 Al:1 Len:2]
1031 > IO:[1 0xbc - 0xbc Al:1 Len:2]
1032 > IO:[1 0x4d0 - 0x4d0 Al:1 Len:2]
1033 >Trigger by Edge, Polarity High IRQ-2
1034 > ENDTAG
1035 Possible State:
1036 |
1037 +*_HID T:[Integer]
1038 |
1039 +*_CRS T:[Buffer]
1040 |
1041 +*MATH T:[Device] HID:[PNP0C04] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1042 Current state:
1043 > IO:[1 0xf0 - 0xf0 Al:1 Len:1]
1044 >Trigger by Edge, Polarity High IRQ-13
1045 > ENDTAG
1046 Possible State:
1047 |
1048 +*_HID T:[Integer]
1049 |
1050 +*_CRS T:[Buffer]
1051 |
1052 +*MBD0 T:[Device] HID:[PNP0C02] UID:[1] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1053 Current state:
1054 > IO:[1 0x61 - 0x61 Al:1 Len:1]
1055 > IO:[1 0x63 - 0x63 Al:1 Len:1]
1056 > IO:[1 0x65 - 0x65 Al:1 Len:1]
1057 > IO:[1 0x67 - 0x67 Al:1 Len:1]
1058 > IO:[1 0x80 - 0x80 Al:1 Len:1]
1059 > IO:[1 0x92 - 0x92 Al:1 Len:1]
1060 > IO:[1 0xb2 - 0xb2 Al:1 Len:2]
1061 > IO:[1 0x800 - 0x800 Al:1 Len:16]
1062 > IO:[1 0x1000 - 0x1000 Al:1 Len:128]
1063 > IO:[1 0x1180 - 0x1180 Al:1 Len:64]
1064 > IO:[1 0x1200 - 0x1200 Al:1 Len:1]
1065 > IO:[1 0x1204 - 0x1204 Al:1 Len:1]
1066 > FIXED-MEM32:[1 0xe0000000 Len:268435456]
1067 > FIXED-MEM32:[1 0xf0000000 Len:16384]
1068 > FIXED-MEM32:[1 0xf0004000 Len:4096]
1069 > FIXED-MEM32:[1 0xf0005000 Len:4096]
1070 > FIXED-MEM32:[1 0xf0008000 Len:16384]
1071 > FIXED-MEM32:[1 0xfed20000 Len:458752]
1072 > ENDTAG
1073 Possible State:
1074 |
1075 +*_HID T:[Integer]
1076 |
1077 +*_UID T:[Integer]
1078 |
1079 +*_CRS T:[Buffer]
1080 |
1081 +*MBD1 T:[Device] HID:[PNP0C02] UID:[2] STA:[0x0] SxD State:[0xff:ff:ff:ff]
1082 Current state:
1083 > FIXED-MEM32:[1 0xfec00000 Len:4096]
1084 > FIXED-MEM32:[1 0xfee00000 Len:4096]
1085 > ENDTAG
1086 Possible State:
1087 |
1088 +*_HID T:[Integer]
1089 |
1090 +*_UID T:[Integer]
1091 |
1092 +*_CRS T:[Buffer]
1093 |
1094 +*_STA T:[Method]
1095 |
1096 +*RTC_ T:[Device] HID:[PNP0B00] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1097 Current state:
1098 > IO:[1 0x70 - 0x70 Al:1 Len:8]
1099 >Trigger by Edge, Polarity High IRQ-8
1100 > ENDTAG
1101 Possible State:
1102 |
1103 +*_HID T:[Integer]
1104 |
1105 +*BUF0 T:[Buffer]
1106 |
1107 +*BUF1 T:[Buffer]
1108 |
1109 +*_CRS T:[Method]
1110 |
1111 +*TIMR T:[Device] HID:[PNP0100] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1112 Current state:
1113 > IO:[1 0x40 - 0x40 Al:1 Len:4]
1114 > IO:[1 0x50 - 0x50 Al:16 Len:4]
1115 >Trigger by Edge, Polarity High IRQ-0
1116 > ENDTAG
1117 Possible State:
1118 |
1119 +*_HID T:[Integer]
1120 |
1121 +*BUF0 T:[Buffer]
1122 |
1123 +*BUF1 T:[Buffer]
1124 |
1125 +*_CRS T:[Method]
1126 |
1127 +*N393 T:[Region]
1128 |
1129 +*INDX T:[RegionField]
1130 |
1131 +*DATA T:[RegionField]
1132 |
1133 +*MTIO T:[Mutex]
1134 |
1135 +*SETD T:[Method]
1136 |
1137 +*READ T:[Method]
1138 |
1139 +*WRIT T:[Method]
1140 |
1141 +*STAT T:[Method]
1142 |
1143 +*LPT_ T:[Device] HID:[PNP0400] UID:[0] STA:[0x9] SxD State:[0xff:ff:ff:ff]
1144 Current state:
1145 > IO:[1 0xffff - 0xffff Al:1 Len:8]
1146 >Trigger by Edge, Polarity High IRQ-15
1147 > ENDTAG
1148 Possible State:
1149 > DPF-S: CP:0x1 PR:0x1
1150 > IO:[1 0x378 - 0x378 Al:1 Len:8]
1151 >Trigger by Edge, Polarity High IRQ-5 IRQ-7
1152 > DPF-S: CP:0x1 PR:0x1
1153 > IO:[1 0x278 - 0x278 Al:1 Len:8]
1154 >Trigger by Edge, Polarity High IRQ-5 IRQ-7
1155 > DPF-S: CP:0x1 PR:0x1
1156 > IO:[1 0x3bc - 0x3bc Al:1 Len:4]
1157 >Trigger by Edge, Polarity High IRQ-5 IRQ-7
1158 > DPF-E: CP:0x0 PR:0x0
1159 > ENDTAG
1160 |
1161 +*_UID T:[Integer]
1162 |
1163 +*FLAG T:[Integer]
1164 |
1165 +*ISNO T:[Integer]
1166 |
1167 +*MECP T:[Integer]
1168 |
1169 +*MLPT T:[Integer]
1170 |
1171 +*MODE T:[Method]
1172 |
1173 +*_HID T:[Method]
1174 |
1175 +*_STA T:[Method]
1176 |
1177 +*_DIS T:[Method]
1178 |
1179 +*CRSA T:[Buffer]
1180 |
1181 +*CRSB T:[Buffer]
1182 |
1183 +*_CRS T:[Method]
1184 |
1185 +*PRSA T:[Buffer]
1186 |
1187 +*PRSB T:[Buffer]
1188 |
1189 +*_PRS T:[Method]
1190 |
1191 +*_SRS T:[Method]
1192 |
1193 +*_INI T:[Method]
1194 |
1195 +*KBC0 T:[Device] HID:[PNP0303] STA:[0xf] SxD State:[0xff:ff:ff:ff]
1196 Current state:
1197 > IO:[1 0x60 - 0x60 Al:1 Len:1]
1198 > IO:[1 0x64 - 0x64 Al:1 Len:1]
1199 >Trigger by Edge, Polarity High IRQ-1
1200 > ENDTAG
1201 Possible State:
1202 |
1203 +*_HID T:[Integer]
1204 |
1205 +*_CRS T:[Buffer]
1206 |
1207 +*_STA T:[Method]
1208 |
1209 +*KBC1 T:[Device] HID:[PNP0320] STA:[0x0] SxD State:[0xff:ff:ff:ff]
1210 Current state:
1211 > IO:[1 0x60 - 0x60 Al:1 Len:1]
1212 > IO:[1 0x64 - 0x64 Al:1 Len:1]
1213 >Trigger by Edge, Polarity High IRQ-1
1214 > ENDTAG
1215 Possible State:
1216 |
1217 +*_HID T:[Integer]
1218 |
1219 +*_CRS T:[Buffer]
1220 |
1221 +*_STA T:[Method]
1222 |
1223 +*PS2MStatus 0xb 11 - The buffer provided is too small
1224 T:[UNDEFINED]
1225 |
1226 +*_HID T:[Integer]
1227 |
1228 +*_CID T:[Package]
1229 |
1230 +*_CRS T:[Buffer]
1231 |
1232 +*PATA T:[Device] ADR:[0x1f0001] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1233 Current state:
1234 Possible State:
1235 |
1236 +*_ADR T:[Integer]
1237 |
1238 +*PACS T:[Region]
1239 |
1240 +*PRIT T:[RegionField]
1241 |
1242 +*PSIT T:[RegionField]
1243 |
1244 +*SYNC T:[RegionField]
1245 |
1246 +*SDT0 T:[RegionField]
1247 |
1248 +*SDT1 T:[RegionField]
1249 |
1250 +*ICR0 T:[RegionField]
1251 |
1252 +*ICR1 T:[RegionField]
1253 |
1254 +*ICR2 T:[RegionField]
1255 |
1256 +*ICR3 T:[RegionField]
1257 |
1258 +*ICR4 T:[RegionField]
1259 |
1260 +*ICR5 T:[RegionField]
1261 |
1262 +*PRID T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1263 Current state:
1264 Possible State:
1265 |
1266 +*_ADR T:[Integer]
1267 |
1268 +*_GTM T:[Method]
1269 |
1270 +*_STM T:[Method]
1271 |
1272 +*P_D0 T:[Device] ADR:[0x0] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1273 Current state:
1274 Possible State:
1275 |
1276 +*_ADR T:[Integer]
1277 |
1278 +*_GTF T:[Method]
1279 |
1280 +*P_D1 T:[Device] ADR:[0x1] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1281 Current state:
1282 Possible State:
1283 |
1284 +*_ADR T:[Integer]
1285 |
1286 +*_GTF T:[Method]
1287 |
1288 +*SATA T:[Device] ADR:[0x1f0002] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1289 Current state:
1290 Possible State:
1291 |
1292 +*_ADR T:[Integer]
1293 |
1294 +*SACS T:[Region]
1295 |
1296 +*PRIT T:[RegionField]
1297 |
1298 +*SECT T:[RegionField]
1299 |
1300 +*PSIT T:[RegionField]
1301 |
1302 +*SSIT T:[RegionField]
1303 |
1304 +*SYNC T:[RegionField]
1305 |
1306 +*SDT0 T:[RegionField]
1307 |
1308 +*SDT1 T:[RegionField]
1309 |
1310 +*SDT2 T:[RegionField]
1311 |
1312 +*SDT3 T:[RegionField]
1313 |
1314 +*ICR0 T:[RegionField]
1315 |
1316 +*ICR1 T:[RegionField]
1317 |
1318 +*ICR2 T:[RegionField]
1319 |
1320 +*ICR3 T:[RegionField]
1321 |
1322 +*ICR4 T:[RegionField]
1323 |
1324 +*ICR5 T:[RegionField]
1325 |
1326 +*MAPV T:[RegionField]
1327 |
1328 +*PCSR T:[RegionField]
1329 |
1330 +*PRT0 T:[Device] ADR:[0xffff] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1331 Current state:
1332 Possible State:
1333 |
1334 +*_ADR T:[Integer]
1335 |
1336 +*_SDD T:[Method]
1337 |
1338 +*_GTF T:[Method]
1339 |
1340 +*PRT2 T:[Device] ADR:[0x2ffff] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1341 Current state:
1342 Possible State:
1343 |
1344 +*_ADR T:[Integer]
1345 |
1346 +*_SDD T:[Method]
1347 |
1348 +*_GTF T:[Method]
1349 |
1350 +*SBUS T:[Device] ADR:[0x1f0003] STA:[0xffffffff] SxD State:[0xff:ff:ff:ff]
1351 Current state:
1352 Possible State:
1353 |
1354 +*_ADR T:[Integer]
1355 |
1356 +*SMBP T:[Region]
1357 |
1358 +*I2CE T:[RegionField]
1359 |
1360 +*SMBI T:[Region]
1361 |
1362 +*HSTS T:[RegionField]
1363 |
1364 +*HCON T:[RegionField]
1365 |
1366 +*HCOM T:[RegionField]
1367 |
1368 +*TXSA T:[RegionField]
1369 |
1370 +*DAT0 T:[RegionField]
1371 |
1372 +*DAT1 T:[RegionField]
1373 |
1374 +*HBDR T:[RegionField]
1375 |
1376 +*PECR T:[RegionField]
1377 |
1378 +*RXSA T:[RegionField]
1379 |
1380 +*SDAT T:[RegionField]
1381 |
1382 +*SSXB T:[Method]
1383 |
1384 +*SRXB T:[Method]
1385 |
1386 +*SWRB T:[Method]
1387 |
1388 +*SRDB T:[Method]
1389 |
1390 +*SBLW T:[Method]
1391 |
1392 +*SBLR T:[Method]
1393 |
1394 +*STRT T:[Method]
1395 |
1396 +*COMP T:[Method]
1397 |
1398 +*KILL T:[Method]
1399|
1400+*_SI_ T:[Scope]
1401 |
1402 +*_SST T:[Method]
1403|
1404+*_TZ_ T:[Thermal]
1405 Thermal State:
1406 |
1407 +*TBSE T:[Integer]
1408 |
1409 +*LTMP T:[Integer]
1410 |
1411 +*CRT0 T:[Integer]
1412 |
1413 +*CRT1 T:[Integer]
1414 |
1415 +*PSV0 T:[Integer]
1416 |
1417 +*PSV1 T:[Integer]
1418 |
1419 +*S0BF T:[Integer]
1420 |
1421 +*S1BF T:[Integer]
1422 |
1423 +*T4FG T:[Integer]
1424 |
1425 +*T5FG T:[Integer]
1426 |
1427 +*TZS0 T:[Thermal]
1428 Thermal State:
1429 |
1430 +*_TMP T:[Method]
1431 |
1432 +*_CRT T:[Method]
1433 |
1434 +*_PSL T:[Package]
1435 |
1436 +*_PSV T:[Method]
1437 |
1438 +*_TC1 T:[Integer]
1439 |
1440 +*_TC2 T:[Integer]
1441 |
1442 +*_TSP T:[Integer]
1443 |
1444 +*TZS1 T:[Thermal]
1445 Thermal State:
1446 |
1447 +*_TMP T:[Method]
1448 |
1449 +*_CRT T:[Method]
1450 |
1451 +*_PSL T:[Package]
1452 |
1453 +*_PSV T:[Method]
1454 |
1455 +*_TC1 T:[Integer]
1456 |
1457 +*_TC2 T:[Integer]
1458 |
1459 +*_TSP T:[Integer]
1460 |
1461 +*C2K_ T:[Method]
1462|
1463+*_REV T:[Integer]
1464|
1465+*_OS_ T:[String]
1466|
1467+*_GL_ T:[Mutex]
1468|
1469+*_OSI T:[Method]
1470|
1471+*PORT T:[Region]
1472|
1473+*P80H T:[RegionField]
1474|
1475+*IO_T T:[Region]
1476|
1477+*TRP0 T:[RegionField]
1478|
1479+*GPIO T:[Region]
1480|
1481+*GU00 T:[RegionField]
1482|
1483+*GU01 T:[RegionField]
1484|
1485+*GU02 T:[RegionField]
1486|
1487+*GU03 T:[RegionField]
1488|
1489+*GIO0 T:[RegionField]
1490|
1491+*GIO1 T:[RegionField]
1492|
1493+*GIO2 T:[RegionField]
1494|
1495+*GIO3 T:[RegionField]
1496|
1497+*GL00 T:[RegionField]
1498|
1499+*GL01 T:[RegionField]
1500|
1501+*GP21 T:[RegionField]
1502|
1503+*GP23 T:[RegionField]
1504|
1505+*GP25 T:[RegionField]
1506|
1507+*GB00 T:[RegionField]
1508|
1509+*GB01 T:[RegionField]
1510|
1511+*GB02 T:[RegionField]
1512|
1513+*GB03 T:[RegionField]
1514|
1515+*GIV0 T:[RegionField]
1516|
1517+*GIV1 T:[RegionField]
1518|
1519+*GIV2 T:[RegionField]
1520|
1521+*GIV3 T:[RegionField]
1522|
1523+*GU04 T:[RegionField]
1524|
1525+*GU05 T:[RegionField]
1526|
1527+*GU06 T:[RegionField]
1528|
1529+*GU07 T:[RegionField]
1530|
1531+*GIO4 T:[RegionField]
1532|
1533+*GIO5 T:[RegionField]
1534|
1535+*GIO6 T:[RegionField]
1536|
1537+*GIO7 T:[RegionField]
1538|
1539+*GP33 T:[RegionField]
1540|
1541+*GL05 T:[RegionField]
1542|
1543+*GP48 T:[RegionField]
1544|
1545+*GL07 T:[RegionField]
1546|
1547+*MNVS T:[Region]
1548|
1549+*OSYS T:[RegionField]
1550|
1551+*SMIF T:[RegionField]
1552|
1553+*PAR1 T:[RegionField]
1554|
1555+*PAR2 T:[RegionField]
1556|
1557+*SCIF T:[RegionField]
1558|
1559+*PAR3 T:[RegionField]
1560|
1561+*PAR4 T:[RegionField]
1562|
1563+*LCKF T:[RegionField]
1564|
1565+*PRM4 T:[RegionField]
1566|
1567+*PRM5 T:[RegionField]
1568|
1569+*P80D T:[RegionField]
1570|
1571+*LIDS T:[RegionField]
1572|
1573+*PWRS T:[RegionField]
1574|
1575+*DBGS T:[RegionField]
1576|
1577+*ACTT T:[RegionField]
1578|
1579+*PSVT T:[RegionField]
1580|
1581+*TC1V T:[RegionField]
1582|
1583+*TC2V T:[RegionField]
1584|
1585+*TSPV T:[RegionField]
1586|
1587+*CRTT T:[RegionField]
1588|
1589+*BNUM T:[RegionField]
1590|
1591+*B0SC T:[RegionField]
1592|
1593+*B1SC T:[RegionField]
1594|
1595+*B2SC T:[RegionField]
1596|
1597+*B0SS T:[RegionField]
1598|
1599+*B1SS T:[RegionField]
1600|
1601+*B2SS T:[RegionField]
1602|
1603+*APIC T:[RegionField]
1604|
1605+*CPUL T:[RegionField]
1606|
1607+*CPUH T:[RegionField]
1608|
1609+*GV3E T:[RegionField]
1610|
1611+*HTTE T:[RegionField]
1612|
1613+*WTHT T:[RegionField]
1614|
1615+*NATP T:[RegionField]
1616|
1617+*CMAP T:[RegionField]
1618|
1619+*CMBP T:[RegionField]
1620|
1621+*LPTP T:[RegionField]
1622|
1623+*FDCP T:[RegionField]
1624|
1625+*CMCP T:[RegionField]
1626|
1627+*IGDS T:[RegionField]
1628|
1629+*TLST T:[RegionField]
1630|
1631+*CADL T:[RegionField]
1632|
1633+*PADL T:[RegionField]
1634|
1635+*CSTE T:[RegionField]
1636|
1637+*NSTE T:[RegionField]
1638|
1639+*SSTE T:[RegionField]
1640|
1641+*NDID T:[RegionField]
1642|
1643+*DID1 T:[RegionField]
1644|
1645+*DID2 T:[RegionField]
1646|
1647+*DID3 T:[RegionField]
1648|
1649+*DID4 T:[RegionField]
1650|
1651+*DID5 T:[RegionField]
1652|
1653+*DID6 T:[RegionField]
1654|
1655+*DID7 T:[RegionField]
1656|
1657+*DID8 T:[RegionField]
1658|
1659+*BLCS T:[RegionField]
1660|
1661+*BRTL T:[RegionField]
1662|
1663+*ALSE T:[RegionField]
1664|
1665+*ALAF T:[RegionField]
1666|
1667+*LLOW T:[RegionField]
1668|
1669+*LHIH T:[RegionField]
1670|
1671+*EMAE T:[RegionField]
1672|
1673+*EMAP T:[RegionField]
1674|
1675+*EMAL T:[RegionField]
1676|
1677+*GTF0 T:[RegionField]
1678|
1679+*GTF2 T:[RegionField]
1680|
1681+*IDEM T:[RegionField]
1682|
1683+*RCRB T:[Region]
1684|
1685+*HPAS T:[RegionField]
1686|
1687+*HPAE T:[RegionField]
1688|
1689+*PATD T:[RegionField]
1690|
1691+*SATD T:[RegionField]
1692|
1693+*SMBD T:[RegionField]
1694|
1695+*AZAD T:[RegionField]
1696|
1697+*A97D T:[RegionField]
1698|
1699+*RP1D T:[RegionField]
1700|
1701+*RP2D T:[RegionField]
1702|
1703+*RP3D T:[RegionField]
1704|
1705+*RP4D T:[RegionField]
1706|
1707+*MSMI T:[Mutex]
1708|
1709+*PHSR T:[Method]
1710|
1711+*HKEY T:[Method]
1712|
1713+*LAMN T:[Method]
1714|
1715+*RBEC T:[Method]
1716|
1717+*WBEC T:[Method]
1718|
1719+*MBEC T:[Method]
1720|
1721+*MUTX T:[Mutex]
1722|
1723+*_S0_ T:[Package]
1724|
1725+*_S3_ T:[Package]
1726|
1727+*_S4_ T:[Package]
1728|
1729+*_S5_ T:[Package]
1730|
1731+*DSEN T:[Integer]
1732|
1733+*ECON T:[Integer]
1734|
1735+*GPIC T:[Integer]
1736|
1737+*CTYP T:[Integer]
1738|
1739+*L01C T:[Integer]
1740|
1741+*TVSF T:[Integer]
1742|
1743+*BOBO T:[Integer]
1744|
1745+*DDST T:[Integer]
1746|
1747+*_PIC T:[Method]
1748|
1749+*_PTS T:[Method]
1750|
1751+*_WAK T:[Method]
1752|
1753+*FWSO T:[String]
1754|
1755+*_PSC T:[Integer]
1756|
1757+*_PS0 T:[Method]
1758|
1759+*_PS3 T:[Method]
1760|
1761+*EC19 T:[Method]
1762|
1763+*EC20 T:[Method]
1764|
1765+*GETP T:[Method]
1766|
1767+*GDMA T:[Method]
1768|
1769+*GETT T:[Method]
1770|
1771+*GETF T:[Method]
1772|
1773+*SETP T:[Method]
1774|
1775+*SDMA T:[Method]
1776|
1777+*SETT T:[Method]
1778|
1779+*SSDT T:[Package]
1780|
1781+*CFGD T:[Integer]
1782|
1783+*PDC0 T:[Integer]
1784|
1785+*PDC1 T:[Integer]
1786Status 0x0 0 - No error